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| author | Michel Dänzer <michel.daenzer@amd.com> | 2016-12-06 18:33:03 +0900 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2016-12-08 14:17:12 -0500 |
| commit | 32859f7335d838ee373c40ee0b3c0c6ebc87a488 (patch) | |
| tree | 9bbf5f0ba0b199117392d88d66117c622e60414d /drivers | |
| parent | 7fe285769cf64ff3029eed01ba4e1c020cf0db10 (diff) | |
| download | linux-32859f7335d838ee373c40ee0b3c0c6ebc87a488.tar.bz2 | |
drm/amdgpu/dce6: Set MASTER_UPDATE_MODE to 0 in resume_mc_access as well
Looks like this was missed when dce_v6_0.c was added.
Fixes: e2cdf640cbb5 ("drm/amdgpu: add display controller implementation for si v10")
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c index 18cb295c0f38..e564442b6393 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c @@ -460,9 +460,8 @@ static void dce_v6_0_resume_mc_access(struct amdgpu_device *adev, for (i = 0; i < adev->mode_info.num_crtc; i++) { if (save->crtc_enabled[i]) { tmp = RREG32(mmMASTER_UPDATE_MODE + crtc_offsets[i]); - if ((tmp & 0x7) != 3) { + if ((tmp & 0x7) != 0) { tmp &= ~0x7; - tmp |= 0x3; WREG32(mmMASTER_UPDATE_MODE + crtc_offsets[i], tmp); } tmp = RREG32(mmGRPH_UPDATE + crtc_offsets[i]); |