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authorJisheng Zhang <jszhang@marvell.com>2016-01-20 19:27:23 +0800
committerDavid S. Miller <davem@davemloft.net>2016-01-21 12:04:59 -0800
commit2804ba4edef5b4de01d4c580eb9ab4000f822a53 (patch)
tree9c3bc5665b69bc0ac82b19b98f19066239eb8d2f /drivers
parent0e03f563a04207cc8e5db6afe63309a585995de7 (diff)
downloadlinux-2804ba4edef5b4de01d4c580eb9ab4000f822a53.tar.bz2
net: mvneta: Try to get named core clock first
Some platforms may provide more than one clk for the mvneta IP, for example Marvell BG4CT provides one clk for the mac core, and one clk for the AXI bus logic. To support for more than one clock, we'll need to distinguish between the clock by name. Change clock probing to first try to get "core" clock before falling back to unnamed clock. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/ethernet/marvell/mvneta.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c
index 07d837dc39de..406705580a33 100644
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ethernet/marvell/mvneta.c
@@ -3604,7 +3604,9 @@ static int mvneta_probe(struct platform_device *pdev)
pp->indir[0] = rxq_def;
- pp->clk = devm_clk_get(&pdev->dev, NULL);
+ pp->clk = devm_clk_get(&pdev->dev, "core");
+ if (IS_ERR(pp->clk))
+ pp->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(pp->clk)) {
err = PTR_ERR(pp->clk);
goto err_put_phy_node;