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| author | Bjorn Helgaas <bhelgaas@google.com> | 2019-05-13 18:34:44 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2019-05-13 18:34:44 -0500 |
| commit | ed0eaf320571ca3992ca73144f87984c5770bf5e (patch) | |
| tree | cea24b4999f272ea3bd471dea3edb00a802b79cf /drivers | |
| parent | cdf4315502a53c8fd2ae136a0549bba62167e534 (diff) | |
| parent | 699ca30162686bf305cdf94861be02eb0cf9bda2 (diff) | |
| download | linux-ed0eaf320571ca3992ca73144f87984c5770bf5e.tar.bz2 | |
Merge branch 'remotes/lorenzo/pci/xilinx'
- Check for __get_free_pages() failure in xilinx (Kangjie Lu)
* remotes/lorenzo/pci/xilinx:
PCI: xilinx: Check for __get_free_pages() failure
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/pci/controller/pcie-xilinx.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/drivers/pci/controller/pcie-xilinx.c b/drivers/pci/controller/pcie-xilinx.c index 9bd1a35cd5d8..5bf3af3b28e6 100644 --- a/drivers/pci/controller/pcie-xilinx.c +++ b/drivers/pci/controller/pcie-xilinx.c @@ -336,14 +336,19 @@ static const struct irq_domain_ops msi_domain_ops = { * xilinx_pcie_enable_msi - Enable MSI support * @port: PCIe port information */ -static void xilinx_pcie_enable_msi(struct xilinx_pcie_port *port) +static int xilinx_pcie_enable_msi(struct xilinx_pcie_port *port) { phys_addr_t msg_addr; port->msi_pages = __get_free_pages(GFP_KERNEL, 0); + if (!port->msi_pages) + return -ENOMEM; + msg_addr = virt_to_phys((void *)port->msi_pages); pcie_write(port, 0x0, XILINX_PCIE_REG_MSIBASE1); pcie_write(port, msg_addr, XILINX_PCIE_REG_MSIBASE2); + + return 0; } /* INTx Functions */ @@ -498,6 +503,7 @@ static int xilinx_pcie_init_irq_domain(struct xilinx_pcie_port *port) struct device *dev = port->dev; struct device_node *node = dev->of_node; struct device_node *pcie_intc_node; + int ret; /* Setup INTx */ pcie_intc_node = of_get_next_child(node, NULL); @@ -526,7 +532,9 @@ static int xilinx_pcie_init_irq_domain(struct xilinx_pcie_port *port) return -ENODEV; } - xilinx_pcie_enable_msi(port); + ret = xilinx_pcie_enable_msi(port); + if (ret) + return ret; } return 0; |