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authorLinus Torvalds <torvalds@linux-foundation.org>2016-02-01 15:49:18 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2016-02-01 15:49:18 -0800
commit2c923414d3963b959f65a8a6031972402e6a34a5 (patch)
treed53479dc181fd480d3e50213547bf75fa9bd5a90 /drivers
parent29a8ea4fbe6beda81300835a739740c35c7abcab (diff)
parent49a20454e0eb907093ec564d4e8f3832bcbf9d53 (diff)
downloadlinux-2c923414d3963b959f65a8a6031972402e6a34a5.tar.bz2
Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto fixes from Herbert Xu: "This fixes the following issues: API: - algif_hash needs to wait for init operations to complete. - The has_key setting for shash was always true. Algorithms: - Add missing selections of CRYPTO_HASH. - Fix pkcs7 authentication. Drivers: - Fix stack alignment bug in chacha20-ssse3. - Fix performance regression in caam due to incorrect setting. - Fix potential compile-only build failure of stm32" * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: crypto: atmel-aes - remove calls of clk_prepare() from atomic contexts crypto: algif_hash - wait for crypto_ahash_init() to complete crypto: shash - Fix has_key setting hwrng: stm32 - Fix dependencies for !HAS_IOMEM archs crypto: ghash,poly1305 - select CRYPTO_HASH where needed crypto: chacha20-ssse3 - Align stack pointer to 64 bytes PKCS#7: Don't require SpcSpOpusInfo in Authenticode pkcs7 signatures crypto: caam - make write transactions bufferable on PPC platforms
Diffstat (limited to 'drivers')
-rw-r--r--drivers/char/hw_random/Kconfig1
-rw-r--r--drivers/crypto/atmel-aes.c16
-rw-r--r--drivers/crypto/caam/ctrl.c4
3 files changed, 15 insertions, 6 deletions
diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index dbf22719462f..ff00331bff49 100644
--- a/drivers/char/hw_random/Kconfig
+++ b/drivers/char/hw_random/Kconfig
@@ -372,6 +372,7 @@ config HW_RANDOM_XGENE
config HW_RANDOM_STM32
tristate "STMicroelectronics STM32 random number generator"
depends on HW_RANDOM && (ARCH_STM32 || COMPILE_TEST)
+ depends on HAS_IOMEM
help
This driver provides kernel-side support for the Random Number
Generator hardware found on STM32 microcontrollers.
diff --git a/drivers/crypto/atmel-aes.c b/drivers/crypto/atmel-aes.c
index 6dd3317ca365..3eb3f1279fb7 100644
--- a/drivers/crypto/atmel-aes.c
+++ b/drivers/crypto/atmel-aes.c
@@ -400,7 +400,7 @@ static int atmel_aes_hw_init(struct atmel_aes_dev *dd)
{
int err;
- err = clk_prepare_enable(dd->iclk);
+ err = clk_enable(dd->iclk);
if (err)
return err;
@@ -430,7 +430,7 @@ static int atmel_aes_hw_version_init(struct atmel_aes_dev *dd)
dev_info(dd->dev, "version: 0x%x\n", dd->hw_version);
- clk_disable_unprepare(dd->iclk);
+ clk_disable(dd->iclk);
return 0;
}
@@ -448,7 +448,7 @@ static inline bool atmel_aes_is_encrypt(const struct atmel_aes_dev *dd)
static inline int atmel_aes_complete(struct atmel_aes_dev *dd, int err)
{
- clk_disable_unprepare(dd->iclk);
+ clk_disable(dd->iclk);
dd->flags &= ~AES_FLAGS_BUSY;
if (dd->is_async)
@@ -2091,10 +2091,14 @@ static int atmel_aes_probe(struct platform_device *pdev)
goto res_err;
}
- err = atmel_aes_hw_version_init(aes_dd);
+ err = clk_prepare(aes_dd->iclk);
if (err)
goto res_err;
+ err = atmel_aes_hw_version_init(aes_dd);
+ if (err)
+ goto iclk_unprepare;
+
atmel_aes_get_cap(aes_dd);
err = atmel_aes_buff_init(aes_dd);
@@ -2127,6 +2131,8 @@ err_algs:
err_aes_dma:
atmel_aes_buff_cleanup(aes_dd);
err_aes_buff:
+iclk_unprepare:
+ clk_unprepare(aes_dd->iclk);
res_err:
tasklet_kill(&aes_dd->done_task);
tasklet_kill(&aes_dd->queue_task);
@@ -2155,6 +2161,8 @@ static int atmel_aes_remove(struct platform_device *pdev)
atmel_aes_dma_cleanup(aes_dd);
atmel_aes_buff_cleanup(aes_dd);
+ clk_unprepare(aes_dd->iclk);
+
return 0;
}
diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index 8abb4bc548cc..69d4a1326fee 100644
--- a/drivers/crypto/caam/ctrl.c
+++ b/drivers/crypto/caam/ctrl.c
@@ -534,8 +534,8 @@ static int caam_probe(struct platform_device *pdev)
* long pointers in master configuration register
*/
clrsetbits_32(&ctrl->mcr, MCFGR_AWCACHE_MASK, MCFGR_AWCACHE_CACH |
- MCFGR_WDENABLE | (sizeof(dma_addr_t) == sizeof(u64) ?
- MCFGR_LONG_PTR : 0));
+ MCFGR_AWCACHE_BUFF | MCFGR_WDENABLE |
+ (sizeof(dma_addr_t) == sizeof(u64) ? MCFGR_LONG_PTR : 0));
/*
* Read the Compile Time paramters and SCFGR to determine