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authorKatsuhiro Suzuki <katsuhiro@katsuster.net>2018-11-26 02:56:03 +0900
committerHeiko Stuebner <heiko@sntech.de>2018-11-26 14:22:12 +0100
commitd0618247a80f0c1c5a522b93888f20d8f034ec09 (patch)
tree654aa6d59e8e242125889102ef6dbd3d8ca51e04 /drivers
parente690d1b0dd3d3e5d723ff4bbc90406c65d25079d (diff)
downloadlinux-d0618247a80f0c1c5a522b93888f20d8f034ec09.tar.bz2
clk: rockchip: add clock-id to gate of ACODEC for rk3328
Add the newly added clock-id for PCLK_ACODECPHY to the gate-clock, so that it gets usable from devicetree. Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/clk/rockchip/clk-rk3328.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/rockchip/clk-rk3328.c b/drivers/clk/rockchip/clk-rk3328.c
index 1eb46aa8b2fa..faa94adb2a37 100644
--- a/drivers/clk/rockchip/clk-rk3328.c
+++ b/drivers/clk/rockchip/clk-rk3328.c
@@ -804,7 +804,7 @@ static struct rockchip_clk_branch rk3328_clk_branches[] __initdata = {
GATE(PCLK_USB3_GRF, "pclk_usb3_grf", "pclk_phy_pre", CLK_IGNORE_UNUSED, RK3328_CLKGATE_CON(17), 2, GFLAGS),
GATE(PCLK_USB2_GRF, "pclk_usb2_grf", "pclk_phy_pre", CLK_IGNORE_UNUSED, RK3328_CLKGATE_CON(17), 14, GFLAGS),
GATE(0, "pclk_ddrphy", "pclk_phy_pre", CLK_IGNORE_UNUSED, RK3328_CLKGATE_CON(17), 13, GFLAGS),
- GATE(0, "pclk_acodecphy", "pclk_phy_pre", CLK_IGNORE_UNUSED, RK3328_CLKGATE_CON(17), 5, GFLAGS),
+ GATE(PCLK_ACODECPHY, "pclk_acodecphy", "pclk_phy_pre", 0, RK3328_CLKGATE_CON(17), 5, GFLAGS),
GATE(PCLK_HDMIPHY, "pclk_hdmiphy", "pclk_phy_pre", CLK_IGNORE_UNUSED, RK3328_CLKGATE_CON(17), 7, GFLAGS),
GATE(0, "pclk_vdacphy", "pclk_phy_pre", CLK_IGNORE_UNUSED, RK3328_CLKGATE_CON(17), 8, GFLAGS),
GATE(0, "pclk_phy_niu", "pclk_phy_pre", 0, RK3328_CLKGATE_CON(15), 15, GFLAGS),