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authorBjorn Helgaas <bhelgaas@google.com>2022-05-24 16:42:24 -0500
committerBjorn Helgaas <bhelgaas@google.com>2022-05-24 16:42:24 -0500
commitb8dc34460ceca2e09edd9a1cfde3ba5fac5ebdac (patch)
tree095fb834e60e13cc991c5d3fbbbda652ffc00fd8 /drivers
parent39348d2eb2f5b4ffe47b708240ed243d05c563c4 (diff)
parenta6809941c1f17f455db2cf4ca19c6d8c8746ec25 (diff)
downloadlinux-b8dc34460ceca2e09edd9a1cfde3ba5fac5ebdac.tar.bz2
Merge branch 'remotes/lorenzo/pci/imx6'
- Fix PERST# start-up sequence (Francesco Dolcini) * remotes/lorenzo/pci/imx6: PCI: imx6: Fix PERST# start-up sequence
Diffstat (limited to 'drivers')
-rw-r--r--drivers/pci/controller/dwc/pci-imx6.c23
1 files changed, 14 insertions, 9 deletions
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 6619e3caffe2..7a285fb0f619 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -408,6 +408,11 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)
dev_err(dev, "failed to disable vpcie regulator: %d\n",
ret);
}
+
+ /* Some boards don't have PCIe reset GPIO. */
+ if (gpio_is_valid(imx6_pcie->reset_gpio))
+ gpio_set_value_cansleep(imx6_pcie->reset_gpio,
+ imx6_pcie->gpio_active_high);
}
static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie)
@@ -540,15 +545,6 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
/* allow the clocks to stabilize */
usleep_range(200, 500);
- /* Some boards don't have PCIe reset GPIO. */
- if (gpio_is_valid(imx6_pcie->reset_gpio)) {
- gpio_set_value_cansleep(imx6_pcie->reset_gpio,
- imx6_pcie->gpio_active_high);
- msleep(100);
- gpio_set_value_cansleep(imx6_pcie->reset_gpio,
- !imx6_pcie->gpio_active_high);
- }
-
switch (imx6_pcie->drvdata->variant) {
case IMX8MQ:
reset_control_deassert(imx6_pcie->pciephy_reset);
@@ -595,6 +591,15 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
break;
}
+ /* Some boards don't have PCIe reset GPIO. */
+ if (gpio_is_valid(imx6_pcie->reset_gpio)) {
+ msleep(100);
+ gpio_set_value_cansleep(imx6_pcie->reset_gpio,
+ !imx6_pcie->gpio_active_high);
+ /* Wait for 100ms after PERST# deassertion (PCIe r5.0, 6.6.1) */
+ msleep(100);
+ }
+
return;
err_ref_clk: