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authorAlexander Duyck <alexander.h.duyck@intel.com>2008-11-21 16:49:10 -0800
committerDavid S. Miller <davem@davemloft.net>2008-11-21 16:49:10 -0800
commit005cbdfc29cfc23b8faadd3619eed43e6550bfc1 (patch)
treefb6c63dfdb08ff130cbb02be3da26ba9d5b9ab62 /drivers
parent7e3aab4a9cd7d37f80eee75bebb6a71347f82476 (diff)
downloadlinux-005cbdfc29cfc23b8faadd3619eed43e6550bfc1.tar.bz2
e1000e: disable correctable errors for quad ports while going to D3
There has been an issue seen with the pci-e quad port adapters that will cause them to generate a pci-e correctable error on some system while transitioning to D3. Since no action is needed on this correctable error the simplest solution is to mask off the reporting of correctable errors. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/e1000e/netdev.c22
1 files changed, 21 insertions, 1 deletions
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c
index cc0502bbb9ff..ebbb9f061c87 100644
--- a/drivers/net/e1000e/netdev.c
+++ b/drivers/net/e1000e/netdev.c
@@ -4462,7 +4462,27 @@ static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
pci_disable_device(pdev);
- pci_set_power_state(pdev, pci_choose_state(pdev, state));
+ /*
+ * The pci-e switch on some quad port adapters will report a
+ * correctable error when the MAC transitions from D0 to D3. To
+ * prevent this we need to mask off the correctable errors on the
+ * downstream port of the pci-e switch.
+ */
+ if (adapter->flags & FLAG_IS_QUAD_PORT) {
+ struct pci_dev *us_dev = pdev->bus->self;
+ int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
+ u16 devctl;
+
+ pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
+ pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
+ (devctl & ~PCI_EXP_DEVCTL_CERE));
+
+ pci_set_power_state(pdev, pci_choose_state(pdev, state));
+
+ pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
+ } else {
+ pci_set_power_state(pdev, pci_choose_state(pdev, state));
+ }
return 0;
}