diff options
author | Jacob Keller <jacob.e.keller@intel.com> | 2014-02-22 01:23:54 +0000 |
---|---|---|
committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2014-03-19 23:19:44 -0700 |
commit | f68bfdb14becbce565d72ff2e8571dbb3081db9c (patch) | |
tree | 84a9b8d1510d9dbb43024129dd090ac953812603 /drivers | |
parent | f8cf7a00d82b6c7b984adc917199cb63552957fb (diff) | |
download | linux-f68bfdb14becbce565d72ff2e8571dbb3081db9c.tar.bz2 |
ixgbe: check Core Clock Disable bit
This patch corrects the stop_mac_link_on_d3 function in ixgbe_82599 by
checking the Core Clock Disable bit before stopping link.
CC: Arun Sharma <asharma@fb.com>
Reported-by: Chris Pavlas <chris.pavlas@intel.com>
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c | 6 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/ixgbe/ixgbe_type.h | 3 |
2 files changed, 8 insertions, 1 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c index 572cce47797c..fcba1d9734f9 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c @@ -518,8 +518,12 @@ out: static void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw) { u32 autoc2_reg; + u16 ee_ctrl_2 = 0; - if (!hw->mng_fw_enabled && !hw->wol_enabled) { + hw->eeprom.ops.read(hw, IXGBE_EEPROM_CTRL_2, &ee_ctrl_2); + + if (!hw->mng_fw_enabled && !hw->wol_enabled && + ee_ctrl_2 & IXGBE_EEPROM_CCD_BIT) { autoc2_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC2); autoc2_reg |= IXGBE_AUTOC2_LINK_DISABLE_ON_D3_MASK; IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2_reg); diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h index 69271bc1b227..5b0c73079991 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h @@ -1793,6 +1793,9 @@ enum { #define IXGBE_EEPROM_RD_BUFFER_MAX_COUNT 512 /* EEPROM words # read in burst */ #define IXGBE_EEPROM_WR_BUFFER_MAX_COUNT 256 /* EEPROM words # wr in burst */ +#define IXGBE_EEPROM_CTRL_2 1 /* EEPROM CTRL word 2 */ +#define IXGBE_EEPROM_CCD_BIT 2 /* EEPROM Core Clock Disable bit */ + #ifndef IXGBE_EEPROM_GRANT_ATTEMPTS #define IXGBE_EEPROM_GRANT_ATTEMPTS 1000 /* EEPROM # attempts to gain grant */ #endif |