summaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
authorMichael Chan <mchan@broadcom.com>2005-12-19 16:26:28 -0800
committerDavid S. Miller <davem@davemloft.net>2005-12-19 16:26:28 -0800
commitdc56b7d46dd2b303a844166ef931270b882bf08c (patch)
tree80b4270d0addf4cf335b9dd47e5c4507c8f8a7b6 /drivers
parent8c2dc7e1e7213c55f1b97eba09de6c0cee9ad12f (diff)
downloadlinux-dc56b7d46dd2b303a844166ef931270b882bf08c.tar.bz2
[TG3]: Some low power fixes
Add some missing workarounds in tg3_set_power_state(): 1. Workaround to prevent overdrawing current on 5714. 2. Do not power down 5700's PHY because of hw limitation. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/tg3.c16
1 files changed, 13 insertions, 3 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index d8691224b0b3..de898f175d73 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -1042,17 +1042,26 @@ static void tg3_frob_aux_power(struct tg3 *tp)
udelay(100);
} else {
u32 no_gpio2;
- u32 grc_local_ctrl;
+ u32 grc_local_ctrl = 0;
if (tp_peer != tp &&
(tp_peer->tg3_flags & TG3_FLAG_INIT_COMPLETE) != 0)
return;
+ /* Workaround to prevent overdrawing Amps. */
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) ==
+ ASIC_REV_5714) {
+ grc_local_ctrl |= GRC_LCLCTRL_GPIO_OE3;
+ tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl |
+ grc_local_ctrl);
+ udelay(100);
+ }
+
/* On 5753 and variants, GPIO2 cannot be used. */
no_gpio2 = tp->nic_sram_data_cfg &
NIC_SRAM_DATA_CFG_NO_GPIO2;
- grc_local_ctrl = GRC_LCLCTRL_GPIO_OE0 |
+ grc_local_ctrl |= GRC_LCLCTRL_GPIO_OE0 |
GRC_LCLCTRL_GPIO_OE1 |
GRC_LCLCTRL_GPIO_OE2 |
GRC_LCLCTRL_GPIO_OUTPUT1 |
@@ -1297,7 +1306,8 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
tg3_writephy(tp, MII_TG3_EXT_CTRL,
MII_TG3_EXT_CTRL_FORCE_LED_OFF);
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x01b2);
- tg3_writephy(tp, MII_BMCR, BMCR_PDOWN);
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5700)
+ tg3_writephy(tp, MII_BMCR, BMCR_PDOWN);
}
}