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authorRon Mercer <ron.mercer@qlogic.com>2009-06-07 13:58:28 +0000
committerDavid S. Miller <davem@davemloft.net>2009-06-08 00:09:47 -0700
commitd2ba498668cb9f18677dd150b23f754953dc1fda (patch)
treeff55ad3085e3cf65aafa3b3ee31a67878494a483 /drivers
parentc8269b21ddfd0181881aca959cff64ff15a0b7d3 (diff)
downloadlinux-d2ba498668cb9f18677dd150b23f754953dc1fda.tar.bz2
qlge: Fix timeout on indexed register wait.
There are 8 banks of 'sub-registers' each of which are accessed through address/data register pair. An example would be reading flash or the xgmac. Accessing these require the driver to wait for a ready bit before writing the address and then accessing the data. This patch increases the timeout to 100us to prevent timeouts that have been seen on some platforms. These register are accessed in process context only. Signed-off-by: Ron Mercer <ron.mercer@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/qlge/qlge.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/qlge/qlge.h b/drivers/net/qlge/qlge.h
index fcb159e4df54..e18607124f41 100644
--- a/drivers/net/qlge/qlge.h
+++ b/drivers/net/qlge/qlge.h
@@ -50,7 +50,7 @@
#define MAX_INTER_FRAME_WAIT 10 /* 10 usec max interframe-wait for coalescing */
#define DFLT_INTER_FRAME_WAIT (MAX_INTER_FRAME_WAIT/2)
#define UDELAY_COUNT 3
-#define UDELAY_DELAY 10
+#define UDELAY_DELAY 100
#define TX_DESC_PER_IOCB 8