diff options
author | Michael Chan <mchan@broadcom.com> | 2005-04-21 17:05:28 -0700 |
---|---|---|
committer | David S. Miller <davem@sunset.davemloft.net> | 2005-04-21 17:05:28 -0700 |
commit | 85e94cedc44d1c2c1663b5b18f703ca5e7316e59 (patch) | |
tree | 0e28e8b073f7ecefd2916dd40d248b914d1a6c0b /drivers | |
parent | 053d78000be4906fac6446ad517ca3897dc6cd84 (diff) | |
download | linux-85e94cedc44d1c2c1663b5b18f703ca5e7316e59.tar.bz2 |
[TG3]: Minor 5752 fixes
Some minor 5752 fixes mostly for correctness and add 5752 PHY ID.
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/tg3.c | 24 | ||||
-rw-r--r-- | drivers/net/tg3.h | 1 |
2 files changed, 18 insertions, 7 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index c1881976927d..f22f19bbf11a 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c @@ -1094,7 +1094,7 @@ static int tg3_set_power_state(struct tg3 *tp, int state) CLOCK_CTRL_ALTCLK | CLOCK_CTRL_PWRDOWN_PLL133); udelay(40); - } else if (!((GET_ASIC_REV(tp->pci_chip_rev_id) == 5750) && + } else if (!((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) && (tp->tg3_flags & TG3_FLAG_ENABLE_ASF))) { u32 newbits1, newbits2; @@ -5237,8 +5237,11 @@ static int tg3_reset_hw(struct tg3 *tp) RDMAC_MODE_LNGREAD_ENAB); if (tp->tg3_flags & TG3_FLAG_SPLIT_MODE) rdmac_mode |= RDMAC_MODE_SPLIT_ENABLE; - if ((tp->tg3_flags2 & TG3_FLG2_5705_PLUS) && - tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) { + + /* If statement applies to 5705 and 5750 PCI devices only */ + if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 && + tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) || + (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750)) { if (tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE && (tp->pci_chip_rev_id == CHIPREV_ID_5705_A1 || tp->pci_chip_rev_id == CHIPREV_ID_5705_A2)) { @@ -5249,6 +5252,9 @@ static int tg3_reset_hw(struct tg3 *tp) } } + if (tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) + rdmac_mode |= RDMAC_MODE_FIFO_LONG_BURST; + #if TG3_TSO_SUPPORT != 0 if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) rdmac_mode |= (1 << 27); @@ -5351,8 +5357,10 @@ static int tg3_reset_hw(struct tg3 *tp) WDMAC_MODE_FIFOURUN_ENAB | WDMAC_MODE_FIFOOREAD_ENAB | WDMAC_MODE_LNGREAD_ENAB); - if ((tp->tg3_flags2 & TG3_FLG2_5705_PLUS) && - tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) { + /* If statement applies to 5705 and 5750 PCI devices only */ + if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 && + tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) || + GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) { if ((tp->tg3_flags & TG3_FLG2_TSO_CAPABLE) && (tp->pci_chip_rev_id == CHIPREV_ID_5705_A1 || tp->pci_chip_rev_id == CHIPREV_ID_5705_A2)) { @@ -7025,7 +7033,7 @@ static void __devinit tg3_get_nvram_info(struct tg3 *tp) tw32(NVRAM_CFG1, nvcfg1); } - if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) { + if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) { switch (nvcfg1 & NVRAM_CFG1_VENDOR_MASK) { case FLASH_VENDOR_ATMEL_FLASH_BUFFERED: tp->nvram_jedecnum = JEDEC_ATMEL; @@ -8462,7 +8470,8 @@ static int __devinit tg3_test_dma(struct tg3 *tp) /* DMA read watermark not used on PCIE */ tp->dma_rwctrl |= 0x00180000; } else if (!(tp->tg3_flags & TG3_FLAG_PCIX_MODE)) { - if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) + if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 || + GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) tp->dma_rwctrl |= 0x003f0000; else tp->dma_rwctrl |= 0x003f000f; @@ -8628,6 +8637,7 @@ static char * __devinit tg3_phy_string(struct tg3 *tp) case PHY_ID_BCM5704: return "5704"; case PHY_ID_BCM5705: return "5705"; case PHY_ID_BCM5750: return "5750"; + case PHY_ID_BCM5752: return "5752"; case PHY_ID_BCM8002: return "8002/serdes"; case 0: return "serdes"; default: return "unknown"; diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index 3a91a57a3205..4732a804974b 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h @@ -2150,6 +2150,7 @@ struct tg3 { #define PHY_ID_BCM5704 0x60008190 #define PHY_ID_BCM5705 0x600081a0 #define PHY_ID_BCM5750 0x60008180 +#define PHY_ID_BCM5752 0x60008100 #define PHY_ID_BCM8002 0x60010140 #define PHY_ID_INVALID 0xffffffff #define PHY_ID_REV_MASK 0x0000000f |