summaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
authorJohn W. Linville <linville@tuxdriver.com>2005-04-21 17:03:52 -0700
committerDavid S. Miller <davem@sunset.davemloft.net>2005-04-21 17:03:52 -0700
commit053d78000be4906fac6446ad517ca3897dc6cd84 (patch)
tree3ba4a5f488457ce6432d956b2363e3a3806396f6 /drivers
parent1b440c568e28186956ef765c69ab124401088663 (diff)
downloadlinux-053d78000be4906fac6446ad517ca3897dc6cd84.tar.bz2
[TG3]: add support for bcm5752 rev a1
Replace existing ASIC_REV_5752 definition with ASIC_REV_5752_A0, and add definition for ASIC_REV_5752_A1. Then, add ASIC_REV_5752_A1 to check for setting TG3_FLG2_5750_PLUS in tg3_get_invariants. Signed-off-by: John W. Linville <linville@tuxdriver.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/tg3.c3
-rw-r--r--drivers/net/tg3.h5
2 files changed, 6 insertions, 2 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 0951a9605577..c1881976927d 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -7929,7 +7929,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
tp->pci_bist = (cacheline_sz_reg >> 24) & 0xff;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752_A0 ||
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752_A1)
tp->tg3_flags2 |= TG3_FLG2_5750_PLUS;
if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) ||
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 0cce4044530b..3a91a57a3205 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -125,6 +125,8 @@
#define CHIPREV_ID_5750_A0 0x4000
#define CHIPREV_ID_5750_A1 0x4001
#define CHIPREV_ID_5750_A3 0x4003
+#define CHIPREV_ID_5752_A0 0x5000
+#define CHIPREV_ID_5752_A1 0x6001
#define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12)
#define ASIC_REV_5700 0x07
#define ASIC_REV_5701 0x00
@@ -132,7 +134,8 @@
#define ASIC_REV_5704 0x02
#define ASIC_REV_5705 0x03
#define ASIC_REV_5750 0x04
-#define ASIC_REV_5752 0x05
+#define ASIC_REV_5752_A0 0x05
+#define ASIC_REV_5752_A1 0x06
#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8)
#define CHIPREV_5700_AX 0x70
#define CHIPREV_5700_BX 0x71