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authorSeung-Woo Kim <sw0312.kim@samsung.com>2013-11-22 14:21:08 +0900
committerTomasz Figa <t.figa@samsung.com>2013-12-30 17:53:18 +0100
commit5fdd1b56be51b1ec4dbde5b213d649ac717442da (patch)
tree14ef5229999dbee0411f5cf3ba47a42713a9c848 /drivers
parent6ce4eac1f600b34f2f7f58f9cd8f0503d79e42ae (diff)
downloadlinux-5fdd1b56be51b1ec4dbde5b213d649ac717442da.tar.bz2
clk: samsung: exynos4: Correct SRC_MFC register
The SRC_MFC register offset was incorrect, which could cause have caused wrong calculation of rate of sclk_mfc clock, that could in turn lead to incorrect operation of MFC. This patch corrects it. Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> [t.figa: Updated patch description] Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/clk/samsung/clk-exynos4.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
index ad5ff50c5f28..1a7c1b929c69 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -39,7 +39,7 @@
#define SRC_TOP1 0xc214
#define SRC_CAM 0xc220
#define SRC_TV 0xc224
-#define SRC_MFC 0xcc28
+#define SRC_MFC 0xc228
#define SRC_G3D 0xc22c
#define E4210_SRC_IMAGE 0xc230
#define SRC_LCD0 0xc234