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author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2014-09-25 17:56:43 +0000 |
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committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2015-02-25 15:03:28 +0200 |
commit | 1511c75be01d0511df36096561ef2cbaaa36fa07 (patch) | |
tree | 34cec4491f31825b6cd1b55a447acbc17ea20377 /drivers/video | |
parent | c517d838eb7d07bbe9507871fab3931deccff539 (diff) | |
download | linux-1511c75be01d0511df36096561ef2cbaaa36fa07.tar.bz2 |
OMAPDSS: fix AM43xx minimum pixel clock divider
AM43xx supports pixel clock divider of 1, just like all OMAP3+ SoCs. Fix
the minimum divider value.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video')
-rw-r--r-- | drivers/video/fbdev/omap2/dss/dss_features.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/video/fbdev/omap2/dss/dss_features.c b/drivers/video/fbdev/omap2/dss/dss_features.c index 376270b777f8..b0b6dfd657bf 100644 --- a/drivers/video/fbdev/omap2/dss/dss_features.c +++ b/drivers/video/fbdev/omap2/dss/dss_features.c @@ -440,7 +440,7 @@ static const struct dss_param_range omap3_dss_param_range[] = { static const struct dss_param_range am43xx_dss_param_range[] = { [FEAT_PARAM_DSS_FCK] = { 0, 200000000 }, - [FEAT_PARAM_DSS_PCD] = { 2, 255 }, + [FEAT_PARAM_DSS_PCD] = { 1, 255 }, [FEAT_PARAM_DOWNSCALE] = { 1, 4 }, [FEAT_PARAM_LINEWIDTH] = { 1, 1024 }, }; |