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author | Florian Tobias Schandinat <FlorianSchandinat@gmx.de> | 2011-03-12 21:54:56 +0000 |
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committer | Florian Tobias Schandinat <FlorianSchandinat@gmx.de> | 2011-03-12 21:54:56 +0000 |
commit | 2563afa9ec6970f3545906382cc986ee012f60ec (patch) | |
tree | 861097eb35da2dfda966b70f300eeaf8311fae37 /drivers/video/via/lcd.c | |
parent | bf5ea02d9058a97a0bc2da9ca04ae4b34989407a (diff) | |
parent | e4fcaeff4fcb56779f22f2f11e50ed2a69e650a3 (diff) | |
download | linux-2563afa9ec6970f3545906382cc986ee012f60ec.tar.bz2 |
Merge branch 'viafb-pll' into viafb-next
Diffstat (limited to 'drivers/video/via/lcd.c')
-rw-r--r-- | drivers/video/via/lcd.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c index d75e3f8e9061..64bc7e763103 100644 --- a/drivers/video/via/lcd.c +++ b/drivers/video/via/lcd.c @@ -562,7 +562,7 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table, int set_vres = plvds_setting_info->v_active; int panel_hres = plvds_setting_info->lcd_panel_hres; int panel_vres = plvds_setting_info->lcd_panel_vres; - u32 pll_D_N; + u32 pll_D_N, clock; struct display_timing mode_crt_reg, panel_crt_reg; struct crt_mode_table *panel_crt_table = NULL; struct VideoModeTable *vmode_tbl = viafb_get_mode(panel_hres, @@ -577,7 +577,9 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table, DEBUG_MSG(KERN_INFO "bellow viafb_lcd_set_mode!!\n"); if (VT1636_LVDS == plvds_chip_info->lvds_chip_name) viafb_init_lvds_vt1636(plvds_setting_info, plvds_chip_info); - plvds_setting_info->vclk = panel_crt_table->clk; + clock = panel_crt_reg.hor_total * panel_crt_reg.ver_total + * panel_crt_table->refresh_rate; + plvds_setting_info->vclk = clock; if (set_iga == IGA1) { /* IGA1 doesn't have LCD scaling, so set it as centering. */ viafb_load_crtc_timing(lcd_centering_timging @@ -612,7 +614,7 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table, fill_lcd_format(); - pll_D_N = viafb_get_clk_value(panel_crt_table[0].clk); + pll_D_N = viafb_get_clk_value(clock); DEBUG_MSG(KERN_INFO "PLL=0x%x", pll_D_N); viafb_set_vclock(pll_D_N, set_iga); lcd_patch_skew(plvds_setting_info, plvds_chip_info); |