diff options
| author | Florian Tobias Schandinat <FlorianSchandinat@gmx.de> | 2010-10-24 04:02:14 +0000 |
|---|---|---|
| committer | Florian Tobias Schandinat <FlorianSchandinat@gmx.de> | 2010-10-24 13:04:55 +0000 |
| commit | 51f4332bb5fef869e8a89895a7bac6b4c03b4946 (patch) | |
| tree | eb505244dcfa4a20f30cf1da47c04f9bc4efcdd7 /drivers/video/via/hw.h | |
| parent | adac8d65f399b02e8a2222fc75c658e4b8d24f65 (diff) | |
| download | linux-51f4332bb5fef869e8a89895a7bac6b4c03b4946.tar.bz2 | |
viafb: add initial VX900 support
This patch adds basic support for the new VX900 IGP. Almost everything
that was implemented for other IGPs is expected to work also on VX900
after this patch. The only known issue is that on the CRT output mode
setting does not always work.
It is clear that the possibility for regressions is zero.
A big thanks to VIA Technologies for making this possible and
supporting this work.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Cc: Joseph Chan <JosephChan@via.com.tw>
Cc: Jonathan Corbet <corbet@lwn.net>
Diffstat (limited to 'drivers/video/via/hw.h')
| -rw-r--r-- | drivers/video/via/hw.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/video/via/hw.h b/drivers/video/via/hw.h index b76440946771..668d534542ef 100644 --- a/drivers/video/via/hw.h +++ b/drivers/video/via/hw.h @@ -362,6 +362,17 @@ is reserved, so it may have problem to set 1600x1200 on IGA2. */ #define VX855_IGA2_FIFO_HIGH_THRESHOLD 160 #define VX855_IGA2_DISPLAY_QUEUE_EXPIRE_NUM 320 +/* For VT3410 */ +#define VX900_IGA1_FIFO_MAX_DEPTH 400 +#define VX900_IGA1_FIFO_THRESHOLD 320 +#define VX900_IGA1_FIFO_HIGH_THRESHOLD 320 +#define VX900_IGA1_DISPLAY_QUEUE_EXPIRE_NUM 160 + +#define VX900_IGA2_FIFO_MAX_DEPTH 192 +#define VX900_IGA2_FIFO_THRESHOLD 160 +#define VX900_IGA2_FIFO_HIGH_THRESHOLD 160 +#define VX900_IGA2_DISPLAY_QUEUE_EXPIRE_NUM 320 + #define IGA1_FIFO_DEPTH_SELECT_REG_NUM 1 #define IGA1_FIFO_THRESHOLD_REG_NUM 2 #define IGA1_FIFO_HIGH_THRESHOLD_REG_NUM 2 @@ -879,6 +890,8 @@ struct iga2_crtc_timing { #define VX800_FUNCTION3 0x3353 /* VT3409 chipset*/ #define VX855_FUNCTION3 0x3409 +/* VT3410 chipset*/ +#define VX900_FUNCTION3 0x3410 #define NUM_TOTAL_PLL_TABLE ARRAY_SIZE(pll_value) |