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authorJordan Crouse <jordan.crouse@amd.com>2006-12-08 02:40:53 -0800
committerLinus Torvalds <torvalds@woody.osdl.org>2006-12-08 08:29:08 -0800
commitf378819a19e2b9639f17a1a82c5e12adc9512390 (patch)
treeef6278a50642f63d3ae1667fe33e92fb78536f5b /drivers/video/geode/display_gx.c
parent4c1979c8963528cc6f52203ae62162ed22e171f4 (diff)
downloadlinux-f378819a19e2b9639f17a1a82c5e12adc9512390.tar.bz2
[PATCH] gxfb: Fixups for the AMD Geode GX framebuffer driver
We cannot assume that the BIOS will be correctly setting up the hardware, so set some bits in various display registers to enable video output. Allow an advanced user to specify a frambuffer size, rather then probing the BIOS. All of these fixes were prompted by the OLPC effort. [akpm@osdl.org: cleanups] Signed-off-by: Jordan Crouse <jordan.crouse@amd.com> Cc: "Antonino A. Daplas" <adaplas@pol.net> Acked-by: James Simmons <jsimmons@infradead.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/video/geode/display_gx.c')
-rw-r--r--drivers/video/geode/display_gx.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/video/geode/display_gx.c b/drivers/video/geode/display_gx.c
index 0245169366b3..0f16e4bffc6c 100644
--- a/drivers/video/geode/display_gx.c
+++ b/drivers/video/geode/display_gx.c
@@ -21,6 +21,12 @@
#include "geodefb.h"
#include "display_gx.h"
+#ifdef CONFIG_FB_GEODE_GX_SET_FBSIZE
+unsigned int gx_frame_buffer_size(void)
+{
+ return CONFIG_FB_GEODE_GX_FBSIZE;
+}
+#else
unsigned int gx_frame_buffer_size(void)
{
unsigned int val;
@@ -35,6 +41,7 @@ unsigned int gx_frame_buffer_size(void)
val = (unsigned int)(inw(0xAC1E)) & 0xFFl;
return (val << 19);
}
+#endif
int gx_line_delta(int xres, int bpp)
{
@@ -90,6 +97,7 @@ static void gx_set_mode(struct fb_info *info)
writel(((info->var.xres * info->var.bits_per_pixel/8) >> 3) + 2,
par->dc_regs + DC_LINE_SIZE);
+
/* Enable graphics and video data and unmask address lines. */
dcfg |= DC_DCFG_GDEN | DC_DCFG_VDEN | DC_DCFG_A20M | DC_DCFG_A18M;