diff options
| author | Anand Gadiyar <gadiyar@ti.com> | 2010-11-08 00:20:30 -0600 |
|---|---|---|
| committer | Felipe Balbi <balbi@ti.com> | 2010-11-09 10:24:35 +0200 |
| commit | 6e16edfe62eb49274c8a74dc04d1c6f315f8f82b (patch) | |
| tree | 0292ee9bf87e43207041c195a245f3997bae7566 /drivers/usb | |
| parent | 07397021058b7db468b67f8c41ce29ef6331ab92 (diff) | |
| download | linux-6e16edfe62eb49274c8a74dc04d1c6f315f8f82b.tar.bz2 | |
usb: musb: fail unaligned DMA transfers on v1.8 and above
The Inventra DMA engine in version 1.8 and later of the MUSB
controller cannot handle DMA addresses that are not aligned
to a 4 byte boundary. It ends up ignoring the last two bits
programmed in the DMA_ADDR register. This is a deliberate
design change in the controller and is documented in the
programming guide.
Earlier versions of the controller could handle these
accesses just fine.
Fail dma_channel_program if we see an unaligned address when
using the newer controllers, so that the caller can carry out
the transfer using PIO mode.
(Current callers already have this backup path in place).
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Tested-by: Ming Lei <tom.leiming@gmail.com>
Cc: Ajay Kumar Gupta <ajay.gupta@ti.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb')
| -rw-r--r-- | drivers/usb/musb/musbhsdma.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/usb/musb/musbhsdma.c b/drivers/usb/musb/musbhsdma.c index 6f771af5cbdb..563114d613d6 100644 --- a/drivers/usb/musb/musbhsdma.c +++ b/drivers/usb/musb/musbhsdma.c @@ -158,6 +158,8 @@ static int dma_channel_program(struct dma_channel *channel, dma_addr_t dma_addr, u32 len) { struct musb_dma_channel *musb_channel = channel->private_data; + struct musb_dma_controller *controller = musb_channel->controller; + struct musb *musb = controller->private_data; DBG(2, "ep%d-%s pkt_sz %d, dma_addr 0x%x length %d, mode %d\n", musb_channel->epnum, @@ -167,6 +169,18 @@ static int dma_channel_program(struct dma_channel *channel, BUG_ON(channel->status == MUSB_DMA_STATUS_UNKNOWN || channel->status == MUSB_DMA_STATUS_BUSY); + /* + * The DMA engine in RTL1.8 and above cannot handle + * DMA addresses that are not aligned to a 4 byte boundary. + * It ends up masking the last two bits of the address + * programmed in DMA_ADDR. + * + * Fail such DMA transfers, so that the backup PIO mode + * can carry out the transfer + */ + if ((musb->hwvers >= MUSB_HWVERS_1800) && (dma_addr % 4)) + return false; + channel->actual_len = 0; musb_channel->start_addr = dma_addr; musb_channel->len = len; |