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authorAndiry Xu <andiry.xu@amd.com>2010-07-22 15:23:39 -0700
committerGreg Kroah-Hartman <gregkh@suse.de>2010-08-10 14:35:41 -0700
commit04e51901dd44f40a5a385ced897f6bca87d5f40a (patch)
treee2de4cd04fcca59849b7c40ce7a4c5a5a476171d /drivers/usb/host/xhci.h
parent8e51adccd4c4b9ffcd509d7f2afce0a906139f75 (diff)
downloadlinux-04e51901dd44f40a5a385ced897f6bca87d5f40a.tar.bz2
USB: xHCI: Isochronous transfer implementation
This patch implements isochronous urb enqueue and interrupt handler part. When an isochronous urb is passed to xHCI driver, first check the transfer ring to guarantee there is enough room for the whole urb. Then update the start_frame and interval field of the urb. Always assume URB_ISO_ASAP is set, and never use urb->start_frame as input. The number of isoc TDs is equal to urb->number_of_packets. One isoc TD is consumed every Interval. Each isoc TD consists of an Isoch TRB chained to zero or more Normal TRBs. Call prepare_transfer for each TD to do initialization; then calculate the number of TRBs needed for each TD. If the data required by an isoc TD is physically contiguous (not crosses a page boundary), then only one isoc TRB is needed; otherwise one or more additional normal TRB shall be chained to the isoc TRB by the host. Set TRB_IOC to the last TRB of each isoc TD. Do not ring endpoint doorbell to start xHC procession until all the TDs are inserted to the endpoint transer ring. In irq handler, update urb status and actual_length, increase urb_priv->td_cnt. When all the TDs are completed(td_cnt is equal to urb_priv->length), giveback the urb to usbcore. Signed-off-by: Andiry Xu <andiry.xu@amd.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host/xhci.h')
-rw-r--r--drivers/usb/host/xhci.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index ebf62082950b..e1383d91468b 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -919,6 +919,9 @@ struct xhci_event_cmd {
/* Control transfer TRB specific fields */
#define TRB_DIR_IN (1<<16)
+/* Isochronous TRB specific fields */
+#define TRB_SIA (1<<31)
+
struct xhci_generic_trb {
u32 field[4];
};
@@ -1416,6 +1419,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags, struct urb *urb,
int slot_id, unsigned int ep_index);
int xhci_queue_intr_tx(struct xhci_hcd *xhci, gfp_t mem_flags, struct urb *urb,
int slot_id, unsigned int ep_index);
+int xhci_queue_isoc_tx_prepare(struct xhci_hcd *xhci, gfp_t mem_flags,
+ struct urb *urb, int slot_id, unsigned int ep_index);
int xhci_queue_configure_endpoint(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr,
u32 slot_id, bool command_must_succeed);
int xhci_queue_evaluate_context(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr,