diff options
author | Cyril Roelandt <tipecaml@gmail.com> | 2012-02-25 02:14:57 +0100 |
---|---|---|
committer | Felipe Balbi <balbi@ti.com> | 2012-02-27 16:32:50 +0200 |
commit | 170b778ffbfca8619b6971e8a5e8b864712b72e2 (patch) | |
tree | 88c1533c84f40c2f38c6350123a4f7fc5e150ff7 /drivers/usb/gadget/amd5536udc.c | |
parent | c5cc5ed86667d4ae74fe40ee4ed893f4b46aba05 (diff) | |
download | linux-170b778ffbfca8619b6971e8a5e8b864712b72e2.tar.bz2 |
usb: amd5536udc: Fix brace coding style issues.
Remove a bunch of unneeded braces.
Signed-off-by: Cyril Roelandt <tipecaml@gmail.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb/gadget/amd5536udc.c')
-rw-r--r-- | drivers/usb/gadget/amd5536udc.c | 93 |
1 files changed, 36 insertions, 57 deletions
diff --git a/drivers/usb/gadget/amd5536udc.c b/drivers/usb/gadget/amd5536udc.c index 18883bd0f162..7df2f7082908 100644 --- a/drivers/usb/gadget/amd5536udc.c +++ b/drivers/usb/gadget/amd5536udc.c @@ -204,9 +204,8 @@ static void print_regs(struct udc *dev) DBG(dev, "DMA mode = BF (buffer fill mode)\n"); dev_info(&dev->pdev->dev, "DMA mode (%s)\n", "BF"); } - if (!use_dma) { + if (!use_dma) dev_info(&dev->pdev->dev, "FIFO mode\n"); - } DBG(dev, "-------------------------------------------------------\n"); } @@ -570,9 +569,8 @@ udc_free_request(struct usb_ep *usbep, struct usb_request *usbreq) VDBG(ep->dev, "req->td_data=%p\n", req->td_data); /* free dma chain if created */ - if (req->chain_len > 1) { + if (req->chain_len > 1) udc_free_dma_chain(ep->dev, req); - } pci_pool_free(ep->dev->data_requests, req->td_data, req->td_phys); @@ -640,9 +638,8 @@ udc_txfifo_write(struct udc_ep *ep, struct usb_request *req) bytes = remaining; /* dwords first */ - for (i = 0; i < bytes / UDC_DWORD_BYTES; i++) { + for (i = 0; i < bytes / UDC_DWORD_BYTES; i++) writel(*(buf + i), ep->txfifo); - } /* remaining bytes must be written by byte access */ for (j = 0; j < bytes % UDC_DWORD_BYTES; j++) { @@ -661,9 +658,8 @@ static int udc_rxfifo_read_dwords(struct udc *dev, u32 *buf, int dwords) VDBG(dev, "udc_read_dwords(): %d dwords\n", dwords); - for (i = 0; i < dwords; i++) { + for (i = 0; i < dwords; i++) *(buf + i) = readl(dev->rxfifo); - } return 0; } @@ -676,9 +672,8 @@ static int udc_rxfifo_read_bytes(struct udc *dev, u8 *buf, int bytes) VDBG(dev, "udc_read_bytes(): %d bytes\n", bytes); /* dwords first */ - for (i = 0; i < bytes / UDC_DWORD_BYTES; i++) { + for (i = 0; i < bytes / UDC_DWORD_BYTES; i++) *((u32 *)(buf + (i<<2))) = readl(dev->rxfifo); - } /* remaining bytes must be read by byte access */ if (bytes % UDC_DWORD_BYTES) { @@ -898,9 +893,8 @@ static struct udc_data_dma *udc_get_last_dma_desc(struct udc_request *req) struct udc_data_dma *td; td = req->td_data; - while (td && !(td->status & AMD_BIT(UDC_DMA_IN_STS_L))) { + while (td && !(td->status & AMD_BIT(UDC_DMA_IN_STS_L))) td = phys_to_virt(td->next); - } return td; @@ -950,21 +944,18 @@ static int udc_create_dma_chain( dma_addr = DMA_DONT_USE; /* unset L bit in first desc for OUT */ - if (!ep->in) { + if (!ep->in) req->td_data->status &= AMD_CLEAR_BIT(UDC_DMA_IN_STS_L); - } /* alloc only new desc's if not already available */ len = req->req.length / ep->ep.maxpacket; - if (req->req.length % ep->ep.maxpacket) { + if (req->req.length % ep->ep.maxpacket) len++; - } if (len > req->chain_len) { /* shorter chain already allocated before */ - if (req->chain_len > 1) { + if (req->chain_len > 1) udc_free_dma_chain(ep->dev, req); - } req->chain_len = len; create_new_chain = 1; } @@ -1007,11 +998,12 @@ static int udc_create_dma_chain( /* link td and assign tx bytes */ if (i == buf_len) { - if (create_new_chain) { + if (create_new_chain) req->td_data->next = dma_addr; - } else { - /* req->td_data->next = virt_to_phys(td); */ - } + /* + else + req->td_data->next = virt_to_phys(td); + */ /* write tx bytes */ if (ep->in) { /* first desc */ @@ -1025,11 +1017,12 @@ static int udc_create_dma_chain( UDC_DMA_IN_STS_TXBYTES); } } else { - if (create_new_chain) { + if (create_new_chain) last->next = dma_addr; - } else { - /* last->next = virt_to_phys(td); */ - } + /* + else + last->next = virt_to_phys(td); + */ if (ep->in) { /* write tx bytes */ td->status = AMD_ADDBITS(td->status, @@ -1480,11 +1473,10 @@ static int startup_registers(struct udc *dev) /* program speed */ tmp = readl(&dev->regs->cfg); - if (use_fullspeed) { + if (use_fullspeed) tmp = AMD_ADDBITS(tmp, UDC_DEVCFG_SPD_FS, UDC_DEVCFG_SPD); - } else { + else tmp = AMD_ADDBITS(tmp, UDC_DEVCFG_SPD_HS, UDC_DEVCFG_SPD); - } writel(tmp, &dev->regs->cfg); return 0; @@ -1505,9 +1497,8 @@ static void udc_basic_init(struct udc *dev) mod_timer(&udc_timer, jiffies - 1); } /* stop poll stall timer */ - if (timer_pending(&udc_pollstall_timer)) { + if (timer_pending(&udc_pollstall_timer)) mod_timer(&udc_pollstall_timer, jiffies - 1); - } /* disable DMA */ tmp = readl(&dev->regs->ctl); tmp &= AMD_UNMASK_BIT(UDC_DEVCTL_RDE); @@ -1541,11 +1532,10 @@ static void udc_setup_endpoints(struct udc *dev) /* read enum speed */ tmp = readl(&dev->regs->sts); tmp = AMD_GETBITS(tmp, UDC_DEVSTS_ENUM_SPEED); - if (tmp == UDC_DEVSTS_ENUM_SPEED_HIGH) { + if (tmp == UDC_DEVSTS_ENUM_SPEED_HIGH) dev->gadget.speed = USB_SPEED_HIGH; - } else if (tmp == UDC_DEVSTS_ENUM_SPEED_FULL) { + else if (tmp == UDC_DEVSTS_ENUM_SPEED_FULL) dev->gadget.speed = USB_SPEED_FULL; - } /* set basic ep parameters */ for (tmp = 0; tmp < UDC_EP_NUM; tmp++) { @@ -1571,9 +1561,8 @@ static void udc_setup_endpoints(struct udc *dev) * disabling ep interrupts when ENUM interrupt occurs but ep is * not enabled by gadget driver */ - if (!ep->desc) { + if (!ep->desc) ep_init(dev->regs, ep); - } if (use_dma) { /* @@ -1671,9 +1660,8 @@ static void udc_tasklet_disconnect(unsigned long par) spin_lock(&dev->lock); /* empty queues */ - for (tmp = 0; tmp < UDC_EP_NUM; tmp++) { + for (tmp = 0; tmp < UDC_EP_NUM; tmp++) empty_req_queue(&dev->ep[tmp]); - } } @@ -1747,9 +1735,8 @@ static void udc_timer_function(unsigned long v) * open the fifo */ udc_timer.expires = jiffies + HZ/UDC_RDE_TIMER_DIV; - if (!stop_timer) { + if (!stop_timer) add_timer(&udc_timer); - } } else { /* * fifo contains data now, setup timer for opening @@ -1761,9 +1748,8 @@ static void udc_timer_function(unsigned long v) set_rde++; /* debug: lhadmot_timer_start = 221070 */ udc_timer.expires = jiffies + HZ*UDC_RDE_TIMER_SECONDS; - if (!stop_timer) { + if (!stop_timer) add_timer(&udc_timer); - } } } else @@ -1908,19 +1894,17 @@ static void activate_control_endpoints(struct udc *dev) mod_timer(&udc_timer, jiffies - 1); } /* stop pollstall timer */ - if (timer_pending(&udc_pollstall_timer)) { + if (timer_pending(&udc_pollstall_timer)) mod_timer(&udc_pollstall_timer, jiffies - 1); - } /* enable DMA */ tmp = readl(&dev->regs->ctl); tmp |= AMD_BIT(UDC_DEVCTL_MODE) | AMD_BIT(UDC_DEVCTL_RDE) | AMD_BIT(UDC_DEVCTL_TDE); - if (use_dma_bufferfill_mode) { + if (use_dma_bufferfill_mode) tmp |= AMD_BIT(UDC_DEVCTL_BF); - } else if (use_dma_ppb_du) { + else if (use_dma_ppb_du) tmp |= AMD_BIT(UDC_DEVCTL_DU); - } writel(tmp, &dev->regs->ctl); } @@ -2105,9 +2089,8 @@ static void udc_ep0_set_rde(struct udc *dev) udc_timer.expires = jiffies + HZ/UDC_RDE_TIMER_DIV; set_rde = 1; - if (!stop_timer) { + if (!stop_timer) add_timer(&udc_timer); - } } } } @@ -2295,9 +2278,8 @@ static irqreturn_t udc_data_out_isr(struct udc *dev, int ep_ix) jiffies + HZ*UDC_RDE_TIMER_SECONDS; set_rde = 1; - if (!stop_timer) { + if (!stop_timer) add_timer(&udc_timer); - } } if (ep->num != UDC_EP0OUT_IX) dev->data_ep_queued = 0; @@ -2319,9 +2301,8 @@ static irqreturn_t udc_data_out_isr(struct udc *dev, int ep_ix) /* check pending CNAKS */ if (cnak_pending) { /* CNAk processing when rxfifo empty only */ - if (readl(&dev->regs->sts) & AMD_BIT(UDC_DEVSTS_RXFIFO_EMPTY)) { + if (readl(&dev->regs->sts) & AMD_BIT(UDC_DEVSTS_RXFIFO_EMPTY)) udc_process_cnak_queue(dev); - } } /* clear OUT bits in ep status */ @@ -2582,9 +2563,8 @@ __acquires(dev->lock) if (!timer_pending(&udc_timer)) { udc_timer.expires = jiffies + HZ/UDC_RDE_TIMER_DIV; - if (!stop_timer) { + if (!stop_timer) add_timer(&udc_timer); - } } } @@ -2698,9 +2678,8 @@ __acquires(dev->lock) /* check pending CNAKS */ if (cnak_pending) { /* CNAk processing when rxfifo empty only */ - if (readl(&dev->regs->sts) & AMD_BIT(UDC_DEVSTS_RXFIFO_EMPTY)) { + if (readl(&dev->regs->sts) & AMD_BIT(UDC_DEVSTS_RXFIFO_EMPTY)) udc_process_cnak_queue(dev); - } } finished: |