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authorVardan Mikayelyan <mvardan@synopsys.com>2018-02-16 12:56:03 +0400
committerFelipe Balbi <felipe.balbi@linux.intel.com>2018-03-13 10:47:58 +0200
commit13b1f8e25bfd1d6b96278421f934efdd35be9d5b (patch)
tree886e4590666e6907fa9ec2280274c2917d0c5a91 /drivers/usb/dwc2/hcd.c
parent03ea6d6e9e1ff1b0222eb723eee5990d3511cc4d (diff)
downloadlinux-13b1f8e25bfd1d6b96278421f934efdd35be9d5b.tar.bz2
usb: dwc2: Force mode optimizations
If the dr_mode is USB_DR_MODE_OTG, forcing the mode is needed during driver probe to get the host and device specific HW parameters. Then we clear the force mode bits so that the core operates in OTG mode. The force mode bits should not be touched at any other time during the driver lifetime and they should be preserved whenever the GUSBCFG register is written to. The force mode bit values will persist across soft resets of the core. If the dr_mode is either USB_DR_MODE_HOST or USB_DR_MODE_PERIPHERAL, the force mode is set just once at probe to configure the core as either a host or peripheral. Given the above, we no longer need any other reset delays, force delays, or any forced modes anywhere else in the driver. So replace all calls to dwc2_core_reset_and_force_dr_mode() with dwc2_core_reset() and remove all other unnecessary delays. Also remove the dwc2_force_mode_if_needed() function since the "if needed" part is already taken care of by the polling in dwc2_force_mode(). Finally, remove all other calls to dwc2_clear_force_mode(). Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Vardan Mikayelyan <mvardan@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Diffstat (limited to 'drivers/usb/dwc2/hcd.c')
-rw-r--r--drivers/usb/dwc2/hcd.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
index 66c074265dab..7341d5abe8e1 100644
--- a/drivers/usb/dwc2/hcd.c
+++ b/drivers/usb/dwc2/hcd.c
@@ -141,7 +141,7 @@ static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
/* Reset after a PHY select */
- retval = dwc2_core_reset_and_force_dr_mode(hsotg);
+ retval = dwc2_core_reset(hsotg, false);
if (retval) {
dev_err(hsotg->dev,
@@ -239,7 +239,7 @@ static int dwc2_hs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
/* Reset after setting the PHY parameters */
- retval = dwc2_core_reset_and_force_dr_mode(hsotg);
+ retval = dwc2_core_reset(hsotg, false);
if (retval) {
dev_err(hsotg->dev,
"%s: Reset failed, aborting", __func__);
@@ -2270,7 +2270,7 @@ int dwc2_core_init(struct dwc2_hsotg *hsotg, bool initial_setup)
* needed to in order to properly detect various parameters).
*/
if (!initial_setup) {
- retval = dwc2_core_reset_and_force_dr_mode(hsotg);
+ retval = dwc2_core_reset(hsotg, false);
if (retval) {
dev_err(hsotg->dev, "%s(): Reset failed, aborting\n",
__func__);