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author | Lukas Wunner <lukas@wunner.de> | 2020-03-27 15:38:16 +0100 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-03-27 15:45:54 +0100 |
commit | 8d5b305484e8a3216eeb700ed6c6de870306adbd (patch) | |
tree | 0d91065810f0456a3bc4aa4c3bf9e8ae00ae3452 /drivers/tty | |
parent | 4e36f94e996ebee8a919c6cd419f55e4d08ad4e3 (diff) | |
download | linux-8d5b305484e8a3216eeb700ed6c6de870306adbd.tar.bz2 |
serial: 8250: Optimize irq enable after console write
Commit 7f9803072ff6 ("serial: 8250: Support console on software emulated
rs485 ports") amended serial8250_console_write() with rs485 support, but
positioned the invocation of ->rs485_stop_tx() after re-enablement of
interrupts. The irq handler and ->console_write() are serialized with
the port spinlock, so no problem there, but due to the rs485 delay, the
irq handler may unnecessarily spin for a while. Avoid that by moving
->rs485_stop_tx() before re-enablement of interrupts, which also mirrors
the order at the beginning of serial8250_console_write().
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Link: https://lore.kernel.org/r/019839cb1f61b01210b6ff9ac9f9079ca77f8411.1585319447.git.lukas@wunner.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty')
-rw-r--r-- | drivers/tty/serial/8250/8250_port.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c index a1d3aef3c406..f77bf820b7a3 100644 --- a/drivers/tty/serial/8250/8250_port.c +++ b/drivers/tty/serial/8250/8250_port.c @@ -3268,7 +3268,6 @@ void serial8250_console_write(struct uart_8250_port *up, const char *s, * and restore the IER */ wait_for_xmitr(up, BOTH_EMPTY); - serial_port_out(port, UART_IER, ier); if (em485) { mdelay(port->rs485.delay_rts_after_send); @@ -3276,6 +3275,8 @@ void serial8250_console_write(struct uart_8250_port *up, const char *s, up->rs485_stop_tx(up); } + serial_port_out(port, UART_IER, ier); + /* * The receive handling will happen properly because the * receive ready bit will still be set; it is not cleared |