diff options
author | NeilBrown <neil@brown.name> | 2019-07-01 10:43:07 +1000 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-07-03 18:28:29 +0200 |
commit | baa3477f06af2238bc88a74db22d7e8ea5782dda (patch) | |
tree | 0ba404a9d4a6dfbe1c6d911c220d607ee6a65e0c /drivers/staging/mt7621-dts/mt7621.dtsi | |
parent | cf8e49ae200baa05b8536e99fbee37faf9c2cebb (diff) | |
download | linux-baa3477f06af2238bc88a74db22d7e8ea5782dda.tar.bz2 |
staging: mt7621-dts: add support for second network interface
The mt7621 has two network interfaces, one that connects to an
internal switch, and one that can connect to either that switch
or an external phy, or possibly an internal phy.
The Gnubee-PC2 has an external phy for use with the second interface.
This patch add some support for the second interface to mt7621.dtsi
and add a gbpc2.dts which makes use of this. This allows the second
interface to be used.
I don't fully understand how to configure this interface - the
documentation is thin - so there could well be room for improvement
here.
Signed-off-by: NeilBrown <neil@brown.name>
Link: https://lore.kernel.org/r/156194178766.1430.12784163026696670896.stgit@noble.brown
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/mt7621-dts/mt7621.dtsi')
-rw-r--r-- | drivers/staging/mt7621-dts/mt7621.dtsi | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/drivers/staging/mt7621-dts/mt7621.dtsi b/drivers/staging/mt7621-dts/mt7621.dtsi index 549ff5a0699e..a4c08110094b 100644 --- a/drivers/staging/mt7621-dts/mt7621.dtsi +++ b/drivers/staging/mt7621-dts/mt7621.dtsi @@ -427,16 +427,20 @@ compatible = "mediatek,eth-mac"; reg = <1>; status = "off"; - phy-mode = "rgmii"; - phy-handle = <&phy5>; + phy-mode = "rgmii-rxid"; + phy-handle = <&phy_external>; }; mdio-bus { #address-cells = <1>; #size-cells = <0>; - phy5: ethernet-phy@5 { + phy_external: ethernet-phy@5 { + status = "off"; reg = <5>; - phy-mode = "rgmii"; + phy-mode = "rgmii-rxid"; + + pinctrl-names = "default"; + pinctrl-0 = <&rgmii2_pins>; }; switch0: switch0@0 { |