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author | Yazen Ghannam <yazen.ghannam@amd.com> | 2019-02-28 15:36:11 +0000 |
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committer | Borislav Petkov <bp@suse.de> | 2019-03-27 00:13:25 +0100 |
commit | 0a227af521d6df5286550b62f4b591417170b4ea (patch) | |
tree | adabe9df8f2b26297ef0acc4a67c22b6b1657e14 /drivers/spmi | |
parent | 7835961d377b75ab9ae77f715e378fcb72508306 (diff) | |
download | linux-0a227af521d6df5286550b62f4b591417170b4ea.tar.bz2 |
EDAC/amd64: Support more than two controllers for chip select handling
The struct chip_select array that's used for saving chip select bases
and masks is fixed at length of two. There should be one struct
chip_select for each controller, so this array should be increased to
support systems that may have more than two controllers.
Increase the size of the struct chip_select array to eight, which is the
largest number of controllers per die currently supported on AMD
systems.
Also, carve out the Family 17h+ reading of the bases/masks into a
separate function. This effectively reverts the original bases/masks
reading code to before Family 17h support was added.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Tested-by: Kim Phillips <kim.phillips@amd.com>
Cc: James Morse <james.morse@arm.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: https://lkml.kernel.org/r/20190228153558.127292-5-Yazen.Ghannam@amd.com
Diffstat (limited to 'drivers/spmi')
0 files changed, 0 insertions, 0 deletions