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authorDaniel Mack <zonque@gmail.com>2012-11-14 11:14:26 +0800
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-11-14 12:16:17 +0900
commit2cd451792db174382aaca96c75bc3bf47a6065fe (patch)
treea16e2eed2823febb9b8057d64c1d95716bc1e4f5 /drivers/spi
parent0384e90b853357d24935c65ba0e1bdd27faa6e58 (diff)
downloadlinux-2cd451792db174382aaca96c75bc3bf47a6065fe.tar.bz2
spi/omap: fix D0/D1 direction confusion
0384e90b8 ("spi/mcspi: allow configuration of pin directions") did what it claimed to do the wrong way around. D0/D1 is configured as output by *clearing* the bits in the conf registers, hence also breaking the former default behaviour. Fix this before that change is merged to mainline. Signed-off-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi-omap2-mcspi.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
index 51046332677c..89f73c425c3d 100644
--- a/drivers/spi/spi-omap2-mcspi.c
+++ b/drivers/spi/spi-omap2-mcspi.c
@@ -766,7 +766,7 @@ static int omap2_mcspi_setup_transfer(struct spi_device *spi,
/* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS
* REVISIT: this controller could support SPI_3WIRE mode.
*/
- if (mcspi->pin_dir == MCSPI_PINDIR_D0_OUT_D1_IN) {
+ if (mcspi->pin_dir == MCSPI_PINDIR_D0_IN_D1_OUT) {
l &= ~OMAP2_MCSPI_CHCONF_IS;
l &= ~OMAP2_MCSPI_CHCONF_DPE1;
l |= OMAP2_MCSPI_CHCONF_DPE0;
@@ -1188,8 +1188,8 @@ static int __devinit omap2_mcspi_probe(struct platform_device *pdev)
of_property_read_u32(node, "ti,spi-num-cs", &num_cs);
master->num_chipselect = num_cs;
master->bus_num = bus_num++;
- if (of_get_property(node, "ti,pindir-d0-in-d1-out", NULL))
- mcspi->pin_dir = MCSPI_PINDIR_D0_IN_D1_OUT;
+ if (of_get_property(node, "ti,pindir-d0-out-d1-in", NULL))
+ mcspi->pin_dir = MCSPI_PINDIR_D0_OUT_D1_IN;
} else {
pdata = pdev->dev.platform_data;
master->num_chipselect = pdata->num_cs;