Merge tag 'spi-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Pull spi updates from Mark Brown:
 "For the most part this is a quiet release for SPI, though there's
  several of the more widely used drivers that have had some fairly
  substantial development done on them, mainly improving performance and
  adding support for some more obscure use cases.

  Summary:

   - Support for configuring a minimum time for chip select to be
     deasserted between transfers from Martin Sperl.

   - A rework of the ACPI device instantiation code from Ard Biesheuvel.

   - Fairly substantial development on the AT91 USART, BCM2835 and
     Tegra114 drivers.

   - New driver for Socionext SynQuacer"

* tag 'spi-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (58 commits)
  spi: pxa2xx: Add support for Intel Elkhart Lake
  spi: atmel-quadspi: fix resume call
  spi: atmel-quadspi: void return type for atmel_qspi_init()
  spi: pxa2xx: Set minimum transfer speed
  spi: stm32-qspi: remove signal sensitive on completion
  dt-bindings: spi: stm32-qspi: add dma properties
  spi: uniphier: fix zero-length transfer
  spi: uniphier: fix timeout error
  spi/acpi: avoid spurious matches during slave enumeration
  spi: spi-stm32-qspi: Remove CR_FTHRES_MASK usage
  spi: fix ctrl->num_chipselect constraint
  spi: spi-synquacer: Fixed build on architectures missing readsl/writesl series
  spi/acpi: fix incorrect ACPI parent check
  spi: don't open code list_for_each_entry_safe_reverse()
  spi: No need to assign dummy value in spi_unregister_controller()
  spi: Add a prototype for exported spi_set_cs_timing()
  spi/acpi: enumerate all SPI slaves in the namespace
  spi: qup: fix PIO/DMA transfers.
  spi: Use struct_size() helper
  spi: mediatek: add SPI_LSB_FIRST support
  ...

1 files changed, 5 insertions, 9 deletions

diff --git a/drivers/spi/spi-stm32-qspi.c b/drivers/spi/spi-stm32-qspi.c
index 42f8e3c6aa1f..655e4afbfb2a 100644
--- a/drivers/spi/spi-stm32-qspi.c
+++ b/drivers/spi/spi-stm32-qspi.c
@@ -29,7 +29,7 @@
 #define CR_SSHIFT		BIT(4)
 #define CR_DFM			BIT(6)
 #define CR_FSEL			BIT(7)
-#define CR_FTHRES_MASK		GENMASK(12, 8)
+#define CR_FTHRES_SHIFT		8
 #define CR_TEIE			BIT(16)
 #define CR_TCIE			BIT(17)
 #define CR_FTIE			BIT(18)
@@ -245,12 +245,8 @@ static int stm32_qspi_tx_dma(struct stm32_qspi *qspi,
 	writel_relaxed(cr | CR_DMAEN, qspi->io_base + QSPI_CR);
 
 	t_out = sgt.nents * STM32_COMP_TIMEOUT_MS;
-	if (!wait_for_completion_interruptible_timeout(&qspi->dma_completion,
-						       msecs_to_jiffies(t_out)))
-		err = -ETIMEDOUT;
-
-	if (dma_async_is_tx_complete(dma_ch, cookie,
-				     NULL, NULL) != DMA_COMPLETE)
+	if (!wait_for_completion_timeout(&qspi->dma_completion,
+					 msecs_to_jiffies(t_out)))
 		err = -ETIMEDOUT;
 
 	if (err)
@@ -304,7 +300,7 @@ static int stm32_qspi_wait_cmd(struct stm32_qspi *qspi,
 	cr = readl_relaxed(qspi->io_base + QSPI_CR);
 	writel_relaxed(cr | CR_TCIE | CR_TEIE, qspi->io_base + QSPI_CR);
 
-	if (!wait_for_completion_interruptible_timeout(&qspi->data_completion,
+	if (!wait_for_completion_timeout(&qspi->data_completion,
 				msecs_to_jiffies(STM32_COMP_TIMEOUT_MS))) {
 		err = -ETIMEDOUT;
 	} else {
@@ -463,7 +459,7 @@ static int stm32_qspi_setup(struct spi_device *spi)
 	flash->presc = presc;
 
 	mutex_lock(&qspi->lock);
-	qspi->cr_reg = FIELD_PREP(CR_FTHRES_MASK, 3) | CR_SSHIFT | CR_EN;
+	qspi->cr_reg = 3 << CR_FTHRES_SHIFT | CR_SSHIFT | CR_EN;
 	writel_relaxed(qspi->cr_reg, qspi->io_base + QSPI_CR);
 
 	/* set dcr fsize to max address */