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author | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-02-28 12:05:13 +0100 |
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committer | Mark Brown <broonie@kernel.org> | 2019-03-04 00:02:28 +0000 |
commit | 0e836c3bea7da04cd4e2ed22d8c20654d5a09273 (patch) | |
tree | 3df4c9edc1e22522291c871d4508ad4c54344e20 /drivers/spi/spi-sh-msiof.c | |
parent | daad4d2a0a60b0b2879e66194100b43c41e96ca9 (diff) | |
download | linux-0e836c3bea7da04cd4e2ed22d8c20654d5a09273.tar.bz2 |
spi: sh-msiof: Restrict bits per word to 8/16/24/32 on R-Car Gen2/3
While the MSIOF variants in older SuperH and SH/R-Mobile SoCs support
bits-per-word values in the full range 8..32, the variants present in
R-Car Gen2 and Gen3 SoCs are restricted to 8, 16, 24, or 32.
Obtain the value from family-specific sh_msiof_chipdata to fix this.
Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-sh-msiof.c')
-rw-r--r-- | drivers/spi/spi-sh-msiof.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c index b20e70a2bdd1..e2eb466db10a 100644 --- a/drivers/spi/spi-sh-msiof.c +++ b/drivers/spi/spi-sh-msiof.c @@ -32,6 +32,7 @@ #include <asm/unaligned.h> struct sh_msiof_chipdata { + u32 bits_per_word_mask; u16 tx_fifo_size; u16 rx_fifo_size; u16 ctlr_flags; @@ -1048,6 +1049,7 @@ static int sh_msiof_transfer_one(struct spi_controller *ctlr, } static const struct sh_msiof_chipdata sh_data = { + .bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32), .tx_fifo_size = 64, .rx_fifo_size = 64, .ctlr_flags = 0, @@ -1055,6 +1057,8 @@ static const struct sh_msiof_chipdata sh_data = { }; static const struct sh_msiof_chipdata rcar_gen2_data = { + .bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16) | + SPI_BPW_MASK(24) | SPI_BPW_MASK(32), .tx_fifo_size = 64, .rx_fifo_size = 64, .ctlr_flags = SPI_CONTROLLER_MUST_TX, @@ -1062,6 +1066,8 @@ static const struct sh_msiof_chipdata rcar_gen2_data = { }; static const struct sh_msiof_chipdata rcar_gen3_data = { + .bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16) | + SPI_BPW_MASK(24) | SPI_BPW_MASK(32), .tx_fifo_size = 64, .rx_fifo_size = 64, .ctlr_flags = SPI_CONTROLLER_MUST_TX, @@ -1386,7 +1392,7 @@ static int sh_msiof_spi_probe(struct platform_device *pdev) ctlr->setup = sh_msiof_spi_setup; ctlr->prepare_message = sh_msiof_prepare_message; ctlr->slave_abort = sh_msiof_slave_abort; - ctlr->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32); + ctlr->bits_per_word_mask = chipdata->bits_per_word_mask; ctlr->auto_runtime_pm = true; ctlr->transfer_one = sh_msiof_transfer_one; |