diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-02-18 11:58:08 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2020-02-19 00:08:24 +0000 |
| commit | cd982e6c44a7265e1c7e92de4f696c3b3b376e93 (patch) | |
| tree | f7cf42f0ea2fa6bfc5b6253fcf4021c8b4ff4533 /drivers/spi/spi-rspi.c | |
| parent | 32a9d0545c5da9717395264de9b8e004e4b90893 (diff) | |
| download | linux-cd982e6c44a7265e1c7e92de4f696c3b3b376e93.tar.bz2 | |
spi: rspi: Factor out handling of common mode bits
Basic SPI features like clock phase/polarity and loopback mode are
common to all RSPI variants. Factor them out to reduce duplication.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200218105810.902-2-geert+renesas@glider.be
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-rspi.c')
| -rw-r--r-- | drivers/spi/spi-rspi.c | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c index 85575d45901c..7a1e6d524f34 100644 --- a/drivers/spi/spi-rspi.c +++ b/drivers/spi/spi-rspi.c @@ -239,7 +239,7 @@ struct spi_ops { int (*set_config_register)(struct rspi_data *rspi, int access_size); int (*transfer_one)(struct spi_controller *ctlr, struct spi_device *spi, struct spi_transfer *xfer); - u16 mode_bits; + u16 extra_mode_bits; u16 flags; u16 fifo_size; u8 num_hw_ss; @@ -1122,7 +1122,6 @@ static int rspi_remove(struct platform_device *pdev) static const struct spi_ops rspi_ops = { .set_config_register = rspi_set_config_register, .transfer_one = rspi_transfer_one, - .mode_bits = SPI_CPHA | SPI_CPOL | SPI_LOOP, .flags = SPI_CONTROLLER_MUST_TX, .fifo_size = 8, .num_hw_ss = 2, @@ -1131,7 +1130,6 @@ static const struct spi_ops rspi_ops = { static const struct spi_ops rspi_rz_ops = { .set_config_register = rspi_rz_set_config_register, .transfer_one = rspi_rz_transfer_one, - .mode_bits = SPI_CPHA | SPI_CPOL | SPI_LOOP, .flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX, .fifo_size = 8, /* 8 for TX, 32 for RX */ .num_hw_ss = 1, @@ -1140,8 +1138,7 @@ static const struct spi_ops rspi_rz_ops = { static const struct spi_ops qspi_ops = { .set_config_register = qspi_set_config_register, .transfer_one = qspi_transfer_one, - .mode_bits = SPI_CPHA | SPI_CPOL | SPI_LOOP | - SPI_TX_DUAL | SPI_TX_QUAD | + .extra_mode_bits = SPI_TX_DUAL | SPI_TX_QUAD | SPI_RX_DUAL | SPI_RX_QUAD, .flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX, .fifo_size = 32, @@ -1258,7 +1255,7 @@ static int rspi_probe(struct platform_device *pdev) ctlr->transfer_one = ops->transfer_one; ctlr->prepare_message = rspi_prepare_message; ctlr->unprepare_message = rspi_unprepare_message; - ctlr->mode_bits = ops->mode_bits; + ctlr->mode_bits = SPI_CPHA | SPI_CPOL | SPI_LOOP | ops->extra_mode_bits; ctlr->flags = ops->flags; ctlr->dev.of_node = pdev->dev.of_node; ctlr->use_gpio_descriptors = true; |