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| author | Jarkko Nikula <jarkko.nikula@linux.intel.com> | 2015-10-28 15:13:39 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2015-10-30 11:18:05 +0900 |
| commit | 624ea72ebddc1f61d32c9e6265f8d6f6dacd26d6 (patch) | |
| tree | 64e4ba78b69bb94cba3ced0574249528a2d7e631 /drivers/spi/spi-pxa2xx.c | |
| parent | ceb941afa5c38dae8e273089266c412d362c7963 (diff) | |
| download | linux-624ea72ebddc1f61d32c9e6265f8d6f6dacd26d6.tar.bz2 | |
spi: pxa2xx: Use LPSS prefix for defines that are Intel LPSS specific
Rename a few defines that are specific to Intel LPSS SPI private
registers with LPSS prefix. It makes easier to distinguish them from
common defines.
Suggested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-pxa2xx.c')
| -rw-r--r-- | drivers/spi/spi-pxa2xx.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index 0f6a6c89eab3..9060aee5a7b1 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -61,9 +61,9 @@ MODULE_ALIAS("platform:pxa2xx-spi"); | QUARK_X1000_SSCR1_TFT \ | SSCR1_SPH | SSCR1_SPO | SSCR1_LBM) -#define GENERAL_REG_RXTO_HOLDOFF_DISABLE BIT(24) -#define SPI_CS_CONTROL_SW_MODE BIT(0) -#define SPI_CS_CONTROL_CS_HIGH BIT(1) +#define LPSS_GENERAL_REG_RXTO_HOLDOFF_DISABLE BIT(24) +#define LPSS_CS_CONTROL_SW_MODE BIT(0) +#define LPSS_CS_CONTROL_CS_HIGH BIT(1) struct lpss_config { /* LPSS offset from drv_data->ioaddr */ @@ -250,8 +250,8 @@ static void lpss_ssp_setup(struct driver_data *drv_data) /* Enable software chip select control */ value = __lpss_ssp_read_priv(drv_data, config->reg_cs_ctrl); - value &= ~(SPI_CS_CONTROL_SW_MODE | SPI_CS_CONTROL_CS_HIGH); - value |= SPI_CS_CONTROL_SW_MODE | SPI_CS_CONTROL_CS_HIGH; + value &= ~(LPSS_CS_CONTROL_SW_MODE | LPSS_CS_CONTROL_CS_HIGH); + value |= LPSS_CS_CONTROL_SW_MODE | LPSS_CS_CONTROL_CS_HIGH; __lpss_ssp_write_priv(drv_data, config->reg_cs_ctrl, value); /* Enable multiblock DMA transfers */ @@ -261,7 +261,7 @@ static void lpss_ssp_setup(struct driver_data *drv_data) if (config->reg_general >= 0) { value = __lpss_ssp_read_priv(drv_data, config->reg_general); - value |= GENERAL_REG_RXTO_HOLDOFF_DISABLE; + value |= LPSS_GENERAL_REG_RXTO_HOLDOFF_DISABLE; __lpss_ssp_write_priv(drv_data, config->reg_general, value); } @@ -277,9 +277,9 @@ static void lpss_ssp_cs_control(struct driver_data *drv_data, bool enable) value = __lpss_ssp_read_priv(drv_data, config->reg_cs_ctrl); if (enable) - value &= ~SPI_CS_CONTROL_CS_HIGH; + value &= ~LPSS_CS_CONTROL_CS_HIGH; else - value |= SPI_CS_CONTROL_CS_HIGH; + value |= LPSS_CS_CONTROL_CS_HIGH; __lpss_ssp_write_priv(drv_data, config->reg_cs_ctrl, value); } |