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authorGabriel Fernandez <gabriel.fernandez@st.com>2018-03-19 08:25:51 +0100
committerPhilipp Zabel <p.zabel@pengutronix.de>2018-03-27 10:44:04 +0200
commit197858b68532d415f21a5a92fb6661c67c6c9a97 (patch)
tree9124944c191c4072b49588713362340dc88094a8 /drivers/spi/spi-jcore.c
parentdae5af9762c8f03233b68401ecc4fab4befae11c (diff)
downloadlinux-197858b68532d415f21a5a92fb6661c67c6c9a97.tar.bz2
reset: stm32mp1: Enable stm32mp1 reset driver
stm32mp1 RCC IP 1 has a reset SET register and a reset CLEAR register. Writing '0' on reset SET register has no effect Writing '1' on reset SET register activates the reset of the corresponding peripheral Writing '0' on reset CLEAR register has no effect Writing '1' on reset CLEAR register releases the reset of the corresponding peripheral See Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.txt Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'drivers/spi/spi-jcore.c')
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