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authorMarek Szyprowski <m.szyprowski@samsung.com>2018-03-06 15:33:10 +0100
committerSylwester Nawrocki <s.nawrocki@samsung.com>2018-03-06 17:39:40 +0100
commitedcefb96fb07f6742fd47ac60915e76c1b77768e (patch)
treec488981f64d8f3ad239df3098254b08b5d9f1716 /drivers/soc/samsung
parentec4016ff6e60fffab2e34fe87578c6362147cb98 (diff)
downloadlinux-edcefb96fb07f6742fd47ac60915e76c1b77768e.tar.bz2
clk: samsung: exynos5250: Move PD-dependent clocks to Exynos5 sub-CMU
Clocks related to DISP1 block require special handling for power domain turn on/off sequences. Till now this was handled by Exynos power domain driver, but that approach was limited only to some special cases. This patch moves handling of those operations to clock controller driver. This gives more flexibility and allows fine tune values of some clock-specific registers. This patch moves handling of those mentioned clocks to Exynos5 sub-CMU driver instantiated from Exynos5250 driver. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'drivers/soc/samsung')
-rw-r--r--drivers/soc/samsung/pm_domains.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/soc/samsung/pm_domains.c b/drivers/soc/samsung/pm_domains.c
index f2d6d7a09c16..caf45cf7aa8e 100644
--- a/drivers/soc/samsung/pm_domains.c
+++ b/drivers/soc/samsung/pm_domains.c
@@ -148,6 +148,7 @@ static __init const char *exynos_get_domain_name(struct device_node *node)
}
static const char *soc_force_no_clk[] = {
+ "samsung,exynos5250-clock",
"samsung,exynos5420-clock",
"samsung,exynos5800-clock",
};