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| author | Matthias Brugger <mbrugger@suse.com> | 2020-10-30 12:36:10 +0100 |
|---|---|---|
| committer | Matthias Brugger <matthias.bgg@gmail.com> | 2020-11-27 12:04:42 +0100 |
| commit | 916d6d71ba56cfc19a0bfd8a0e181443a13cb865 (patch) | |
| tree | b893ab58ce6629bf31305e5e1550c0af948ec82c /drivers/soc/mediatek/mt8173-pm-domains.h | |
| parent | 59b644b01cf48d6042f3c5983d464921a4920845 (diff) | |
| download | linux-916d6d71ba56cfc19a0bfd8a0e181443a13cb865.tar.bz2 | |
soc: mediatek: pm-domains: Add bus protection protocol
Bus protection will need to update more then one register
in infracfg. Add support for several operations.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201030113622.201188-5-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'drivers/soc/mediatek/mt8173-pm-domains.h')
| -rw-r--r-- | drivers/soc/mediatek/mt8173-pm-domains.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/soc/mediatek/mt8173-pm-domains.h b/drivers/soc/mediatek/mt8173-pm-domains.h index 5f2b5d4ad02b..72b3acaf74fb 100644 --- a/drivers/soc/mediatek/mt8173-pm-domains.h +++ b/drivers/soc/mediatek/mt8173-pm-domains.h @@ -34,7 +34,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = { .ctl_offs = SPM_DIS_PWR_CON, .sram_pdn_bits = GENMASK(11, 8), .sram_pdn_ack_bits = GENMASK(12, 12), - .bp_infracfg = { + .bp_infracfg[0] = { .bus_prot_reg_update = true, .bus_prot_mask = MT8173_TOP_AXI_PROT_EN_MM_M0 | MT8173_TOP_AXI_PROT_EN_MM_M1, @@ -76,7 +76,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = { .ctl_offs = SPM_MFG_PWR_CON, .sram_pdn_bits = GENMASK(13, 8), .sram_pdn_ack_bits = GENMASK(21, 16), - .bp_infracfg = { + .bp_infracfg[0] = { .bus_prot_reg_update = true, .bus_prot_mask = MT8173_TOP_AXI_PROT_EN_MFG_S | MT8173_TOP_AXI_PROT_EN_MFG_M0 | |