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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2018-08-22 00:01:07 +0300
committerLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2018-09-25 00:41:03 +0300
commit1f98b2a4fd4632db3b585a624032b7ec785a5255 (patch)
tree309825dd24ec9636fc540da9362c3a427d4aacd8 /drivers/regulator
parentb4734f43f3cadfaa423ce6aceb1e9faea07b8eb8 (diff)
downloadlinux-1f98b2a4fd4632db3b585a624032b7ec785a5255.tar.bz2
drm: rcar-du: Enable configurable DPAD0 routing on Gen3
All Gen3 SoCs supported so far have a fixed association between DPAD0 and DU channels, which led to hardcoding that association when writing the corresponding hardware register. The D3 and E3 will break that mechanism as DPAD0 can be dynamically connected to either DU0 or DU1. Make DPAD0 routing dynamic on Gen3. To ensure a valid hardware configuration when the DU starts without the RGB output enabled, DPAD0 is associated at initialization time to the first DU channel that it can be connected to. This makes no change on Gen2 as all Gen2 SoCs can connected DPAD0 to DU0, which is the current implicit default value. As the DPAD0 source is always 0 when a single source is possible on Gen2, we can also simplify the Gen2 code in the same function to remove a conditional check. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
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