diff options
| author | Zhang Rui <rui.zhang@intel.com> | 2019-07-10 21:44:32 +0800 |
|---|---|---|
| committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2019-07-11 15:08:58 +0200 |
| commit | 0c2ddedd8bcb88c4100acb9e0fc5ac8752d09501 (patch) | |
| tree | bb83251e176c8f0ceef4c6d1622d68c909c00461 /drivers/powercap/intel_rapl_msr.c | |
| parent | d978e755aabe215cb67bf713e103ed3916ec306d (diff) | |
| download | linux-0c2ddedd8bcb88c4100acb9e0fc5ac8752d09501.tar.bz2 | |
intel_rapl: support two power limits for every RAPL domain
RAPL MSR interface supports 2 power limits for package domain, and 1 power
limit for other domains, while RAPL MMIO interface supports 2 power limits
for both package and dram domains.
And when 2 power limits are supported, the FW_LOCK bit is in bit 63 of the
register, instead of bit 31.
Remove the assumption that only pakcage domain supports 2 power limits.
And allow the RAPL interface driver to specify the number of power limits
supported, for every single RAPL domain it owns..
Reviewed-by: Pandruvada, Srinivas <srinivas.pandruvada@intel.com>
Tested-by: Pandruvada, Srinivas <srinivas.pandruvada@intel.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers/powercap/intel_rapl_msr.c')
| -rw-r--r-- | drivers/powercap/intel_rapl_msr.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/powercap/intel_rapl_msr.c b/drivers/powercap/intel_rapl_msr.c index 6cd8a8fb9238..bc14a4579acb 100644 --- a/drivers/powercap/intel_rapl_msr.c +++ b/drivers/powercap/intel_rapl_msr.c @@ -41,6 +41,7 @@ static struct rapl_if_priv rapl_msr_priv = { MSR_DRAM_POWER_LIMIT, MSR_DRAM_ENERGY_STATUS, MSR_DRAM_PERF_STATUS, 0, MSR_DRAM_POWER_INFO }, .regs[RAPL_DOMAIN_PLATFORM] = { MSR_PLATFORM_POWER_LIMIT, MSR_PLATFORM_ENERGY_STATUS, 0, 0, 0}, + .limits[RAPL_DOMAIN_PACKAGE] = 2, }; /* Handles CPU hotplug on multi-socket systems. |