diff options
author | Claudiu.Beznea@microchip.com <Claudiu.Beznea@microchip.com> | 2020-01-21 10:03:33 +0000 |
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committer | Sebastian Reichel <sebastian.reichel@collabora.com> | 2020-03-08 19:38:04 +0100 |
commit | 7cb290d3dd559dff5028b9418a31ecb99988f640 (patch) | |
tree | 738f2d2ddcf8ada7cd68ea794bfdc1a0075f313f /drivers/power | |
parent | 25b80b7d5a5b41cb52db441e37a04d71e7196f60 (diff) | |
download | linux-7cb290d3dd559dff5028b9418a31ecb99988f640.tar.bz2 |
power: reset: at91-reset: use r4 as tmp argument
Use r4 as temporary register. On ARM r0-r3 should be used to hold
function arguments.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Diffstat (limited to 'drivers/power')
-rw-r--r-- | drivers/power/reset/at91-reset.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/power/reset/at91-reset.c b/drivers/power/reset/at91-reset.c index dc48f6850796..3b1d566350f4 100644 --- a/drivers/power/reset/at91-reset.c +++ b/drivers/power/reset/at91-reset.c @@ -113,8 +113,8 @@ static int at91sam9g45_restart(struct notifier_block *this, unsigned long mode, "beq 1f\n\t" /* Then, test that the RAM controller is enabled */ - "ldr r0, [%1]\n\t" - "cmp r0, #0\n\t" + "ldr r4, [%1]\n\t" + "cmp r4, #0\n\t" /* Align to cache lines */ ".balign 32\n\t" @@ -138,7 +138,7 @@ static int at91sam9g45_restart(struct notifier_block *this, unsigned long mode, "r" (1), "r" cpu_to_le32(AT91_DDRSDRC_LPCB_POWER_DOWN), "r" (reset->args) - : "r0"); + : "r4"); return NOTIFY_DONE; } |