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author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-01-29 18:54:05 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-01-29 18:54:05 -0800 |
commit | b7a8399edfd7ad3da36d51513ea30a4708b02b52 (patch) | |
tree | 5da5a480f020cefc4450ca679bf7d193fe82462f /drivers/platform/x86/intel_baytrail.h | |
parent | 30c867eebfbd1c25310aec9f152578deaf793080 (diff) | |
parent | b4b0b4a9e0392dbd00e5f033e1329ce61ed06fef (diff) | |
download | linux-b7a8399edfd7ad3da36d51513ea30a4708b02b52.tar.bz2 |
Merge branch 'for_linus' of git://cavan.codon.org.uk/platform-drivers-x86
Pull x86 platform drivers update from Matthew Garrett:
"Nothing amazingly special here. Some cleanups, a new driver to
support a single button on some new HPs, a tiny amount of hardware
enablement"
* 'for_linus' of git://cavan.codon.org.uk/platform-drivers-x86:
ipc: add intel-mid's pci id macros
hp-wireless: new driver for hp wireless button for Windows 8
toshiba_acpi: Support RFKILL hotkey scancode
hp_accel: Add a new PnP ID HPQ6007 for new HP laptops
sony-laptop: remove unnecessary assigment of len
fujitsu-laptop: fix error return code
dell-laptop: Only install the i8042 filter when rfkill is active
X86 platform: New BayTrail IOSF-SB MBI driver
drivers: platform: Include appropriate header file in mxm-wmi.c
drivers: platform: Mark functions as static in hp_accel.c
dell-laptop: rkill whitelist Precision models
ipc: simplify platform data approach
asus-wmi: Convert to use devm_hwmon_device_register_with_groups
compal-laptop: Use devm_hwmon_device_register_with_groups
compal-laptop: Replace SENSOR_DEVICE_ATTR with DEVICE_ATTR
eeepc-laptop: Convert to use devm_hwmon_device_register_with_groups
compal-laptop: Use devm_kzalloc to allocate local data structure
dell-laptop: fix to return error code in dell_send_intensity()
Diffstat (limited to 'drivers/platform/x86/intel_baytrail.h')
-rw-r--r-- | drivers/platform/x86/intel_baytrail.h | 90 |
1 files changed, 90 insertions, 0 deletions
diff --git a/drivers/platform/x86/intel_baytrail.h b/drivers/platform/x86/intel_baytrail.h new file mode 100644 index 000000000000..8bcc311262e9 --- /dev/null +++ b/drivers/platform/x86/intel_baytrail.h @@ -0,0 +1,90 @@ +/* + * intel_baytrail.h: MailBox access support for Intel BayTrail platforms + */ + +#ifndef INTEL_BAYTRAIL_MBI_SYMS_H +#define INTEL_BAYTRAIL_MBI_SYMS_H + +#define BT_MBI_MCR_OFFSET 0xD0 +#define BT_MBI_MDR_OFFSET 0xD4 +#define BT_MBI_MCRX_OFFSET 0xD8 + +#define BT_MBI_RD_MASK 0xFEFFFFFF +#define BT_MBI_WR_MASK 0X01000000 + +#define BT_MBI_MASK_HI 0xFFFFFF00 +#define BT_MBI_MASK_LO 0x000000FF +#define BT_MBI_ENABLE 0xF0 + +/* BT-SB unit access methods */ +#define BT_MBI_UNIT_AUNIT 0x00 +#define BT_MBI_UNIT_SMC 0x01 +#define BT_MBI_UNIT_CPU 0x02 +#define BT_MBI_UNIT_BUNIT 0x03 +#define BT_MBI_UNIT_PMC 0x04 +#define BT_MBI_UNIT_GFX 0x06 +#define BT_MBI_UNIT_SMI 0x0C +#define BT_MBI_UNIT_USB 0x43 +#define BT_MBI_UNIT_SATA 0xA3 +#define BT_MBI_UNIT_PCIE 0xA6 + +/* Read/write opcodes */ +#define BT_MBI_AUNIT_READ 0x10 +#define BT_MBI_AUNIT_WRITE 0x11 +#define BT_MBI_SMC_READ 0x10 +#define BT_MBI_SMC_WRITE 0x11 +#define BT_MBI_CPU_READ 0x10 +#define BT_MBI_CPU_WRITE 0x11 +#define BT_MBI_BUNIT_READ 0x10 +#define BT_MBI_BUNIT_WRITE 0x11 +#define BT_MBI_PMC_READ 0x06 +#define BT_MBI_PMC_WRITE 0x07 +#define BT_MBI_GFX_READ 0x00 +#define BT_MBI_GFX_WRITE 0x01 +#define BT_MBI_SMIO_READ 0x06 +#define BT_MBI_SMIO_WRITE 0x07 +#define BT_MBI_USB_READ 0x06 +#define BT_MBI_USB_WRITE 0x07 +#define BT_MBI_SATA_READ 0x00 +#define BT_MBI_SATA_WRITE 0x01 +#define BT_MBI_PCIE_READ 0x00 +#define BT_MBI_PCIE_WRITE 0x01 + +/** + * bt_mbi_read() - MailBox Interface read command + * @port: port indicating subunit being accessed + * @opcode: port specific read or write opcode + * @offset: register address offset + * @mdr: register data to be read + * + * Locking is handled by spinlock - cannot sleep. + * Return: Nonzero on error + */ +int bt_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr); + +/** + * bt_mbi_write() - MailBox unmasked write command + * @port: port indicating subunit being accessed + * @opcode: port specific read or write opcode + * @offset: register address offset + * @mdr: register data to be written + * + * Locking is handled by spinlock - cannot sleep. + * Return: Nonzero on error + */ +int bt_mbi_write(u8 port, u8 opcode, u32 offset, u32 mdr); + +/** + * bt_mbi_modify() - MailBox masked write command + * @port: port indicating subunit being accessed + * @opcode: port specific read or write opcode + * @offset: register address offset + * @mdr: register data being modified + * @mask: mask indicating bits in mdr to be modified + * + * Locking is handled by spinlock - cannot sleep. + * Return: Nonzero on error + */ +int bt_mbi_modify(u8 port, u8 opcode, u32 offset, u32 mdr, u32 mask); + +#endif /* INTEL_BAYTRAIL_MBI_SYMS_H */ |