diff options
| author | Linus Walleij <linus.walleij@linaro.org> | 2019-10-01 15:32:09 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2019-10-16 15:56:18 +0200 |
| commit | 142b876750a97b883f1c29e1ceae08adfe38c97c (patch) | |
| tree | a0872fe25d71bda77e15a09e409b8e185c0cb020 /drivers/pinctrl | |
| parent | b587c30a5f29ad24f0175089af374dedfcadc495 (diff) | |
| download | linux-142b876750a97b883f1c29e1ceae08adfe38c97c.tar.bz2 | |
pinctrl: ingenic: Pass irqchip when adding gpiochip
We need to convert all old gpio irqchips to pass the irqchip
setup along when adding the gpio_chip. For more info see
drivers/gpio/TODO.
For chained irqchips this is a pretty straight-forward
conversion.
Cc: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Zhou Yanjie <zhouyanjie@zoho.com>
Acked-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20191001133209.17164-1-linus.walleij@linaro.org
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/pinctrl-ingenic.c | 22 |
1 files changed, 14 insertions, 8 deletions
diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c index 6e2683016c1f..06cae38f6daf 100644 --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c @@ -1940,6 +1940,7 @@ static int __init ingenic_gpio_probe(struct ingenic_pinctrl *jzpc, { struct ingenic_gpio_chip *jzgc; struct device *dev = jzpc->dev; + struct gpio_irq_chip *girq; unsigned int bank; int err; @@ -1982,10 +1983,6 @@ static int __init ingenic_gpio_probe(struct ingenic_pinctrl *jzpc, jzgc->gc.free = gpiochip_generic_free; } - err = devm_gpiochip_add_data(dev, &jzgc->gc, jzgc); - if (err) - return err; - jzgc->irq = irq_of_parse_and_map(node, 0); if (!jzgc->irq) return -EINVAL; @@ -2000,13 +1997,22 @@ static int __init ingenic_gpio_probe(struct ingenic_pinctrl *jzpc, jzgc->irq_chip.irq_set_wake = ingenic_gpio_irq_set_wake; jzgc->irq_chip.flags = IRQCHIP_MASK_ON_SUSPEND; - err = gpiochip_irqchip_add(&jzgc->gc, &jzgc->irq_chip, 0, - handle_level_irq, IRQ_TYPE_NONE); + girq = &jzgc->gc.irq; + girq->chip = &jzgc->irq_chip; + girq->parent_handler = ingenic_gpio_irq_handler; + girq->num_parents = 1; + girq->parents = devm_kcalloc(dev, 1, sizeof(*girq->parents), + GFP_KERNEL); + if (!girq->parents) + return -ENOMEM; + girq->parents[0] = jzgc->irq; + girq->default_type = IRQ_TYPE_NONE; + girq->handler = handle_level_irq; + + err = devm_gpiochip_add_data(dev, &jzgc->gc, jzgc); if (err) return err; - gpiochip_set_chained_irqchip(&jzgc->gc, &jzgc->irq_chip, - jzgc->irq, ingenic_gpio_irq_handler); return 0; } |