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authorIcenowy Zheng <icenowy@aosc.io>2017-05-27 18:23:00 +0800
committerLinus Walleij <linus.walleij@linaro.org>2017-05-29 18:31:56 +0200
commit88798ba2f125e3b3c2b22273b5b0f4a81b391977 (patch)
tree1e3d573b001a09b3810d524638a39da976b75149 /drivers/pinctrl/sunxi
parentaccc1ce7d2ffc6419a8eaf8c0190d9240df0c43f (diff)
downloadlinux-88798ba2f125e3b3c2b22273b5b0f4a81b391977.tar.bz2
pinctrl: sunxi: Add SoC ID definitions for A10, A20 and R40 SoCs
Allwinner A10, A20 and R40 SoCs have similar GPIO layout. Add SoC definitions in pinctrl-sunxi.h, in order to merge A20 support into A10 driver, and add R40 support into it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sunxi')
-rw-r--r--drivers/pinctrl/sunxi/pinctrl-sunxi.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
index a9d315a1256c..1bfc0d8a55df 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
@@ -87,6 +87,9 @@
#define PINCTRL_SUN5I_GR8 BIT(3)
#define PINCTRL_SUN6I_A31 BIT(4)
#define PINCTRL_SUN6I_A31S BIT(5)
+#define PINCTRL_SUN4I_A10 BIT(6)
+#define PINCTRL_SUN7I_A20 BIT(7)
+#define PINCTRL_SUN8I_R40 BIT(8)
struct sunxi_desc_function {
unsigned long variant;