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authorMaxime Ripard <maxime.ripard@free-electrons.com>2014-10-28 22:41:26 +0100
committerLinus Walleij <linus.walleij@linaro.org>2014-10-30 15:55:26 +0100
commit4f6bd5cfc6c8f2e8c2c38fdfea8e32f9a463cdbb (patch)
treeeb5ab0590e3dea90987b3b5f66533fe5467d6e83 /drivers/pinctrl/sunxi/pinctrl-sunxi.h
parentfdaaf6d6609b0ddb65cd3211cc7ceb892d7a2550 (diff)
downloadlinux-4f6bd5cfc6c8f2e8c2c38fdfea8e32f9a463cdbb.tar.bz2
pinctrl: sunxi: Add PN bank base pin
The A80 R-PIO controller has one more bank that what we've seen so far, add the PN pin bank. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sunxi/pinctrl-sunxi.h')
-rw-r--r--drivers/pinctrl/sunxi/pinctrl-sunxi.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
index 4245b96c7996..5a51523a3459 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
@@ -27,6 +27,7 @@
#define PI_BASE 256
#define PL_BASE 352
#define PM_BASE 384
+#define PN_BASE 416
#define SUNXI_PINCTRL_PIN(bank, pin) \
PINCTRL_PIN(P ## bank ## _BASE + (pin), "P" #bank #pin)