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authorThierry Reding <treding@nvidia.com>2017-07-20 19:01:07 +0200
committerLinus Walleij <linus.walleij@linaro.org>2017-08-14 15:01:02 +0200
commit556ce55b7352a6634ffc97cece685e8efe7be181 (patch)
treefb92ef462e8a700fbfaff337cb45588ea76d37dc /drivers/pinctrl/sirf
parentf5292d06c4f1d0c220d7c9e9c0553cabe5b37d4c (diff)
downloadlinux-556ce55b7352a6634ffc97cece685e8efe7be181.tar.bz2
pinctrl: sirf: atlas7: Initialize GPIO offset
The GPIO offset is never initialized, which means that it will end up being zero as per the devm_kzalloc() of the parent structure. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sirf')
-rw-r--r--drivers/pinctrl/sirf/pinctrl-atlas7.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pinctrl/sirf/pinctrl-atlas7.c b/drivers/pinctrl/sirf/pinctrl-atlas7.c
index 1efa315a7dbe..d1ef82ca97ad 100644
--- a/drivers/pinctrl/sirf/pinctrl-atlas7.c
+++ b/drivers/pinctrl/sirf/pinctrl-atlas7.c
@@ -6078,6 +6078,7 @@ static int atlas7_gpio_probe(struct platform_device *pdev)
bank = &a7gc->banks[idx];
/* Set ctrl registers' base of this bank */
bank->base = ATLAS7_GPIO_BASE(a7gc, idx);
+ bank->gpio_offset = idx * NGPIO_OF_BANK;
/* Get interrupt number from DTS */
ret = of_irq_get(np, idx);