summaryrefslogtreecommitdiffstats
path: root/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2013-06-21 15:14:10 +0200
committerArnd Bergmann <arnd@arndb.de>2013-06-21 15:14:10 +0200
commitd405534dcd1e17429befc0e38048c73a3affd2b9 (patch)
treef4d48ef00e065bd16205dea522bdbb9b95770f7e /drivers/pinctrl/sh-pfc/pfc-r8a7778.c
parentd925ef43869a2da86444e3f68ebe9ce81efaa0c6 (diff)
parentcd622017eb3e0ab841502df88fb7fda3c3a58eb9 (diff)
downloadlinux-d405534dcd1e17429befc0e38048c73a3affd2b9.tar.bz2
Merge tag 'renesas-pinmux2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
From Simon Horman: Second Round of Renesas ARM based SoC pinmux and GPIO update for v3.11 tidyup MMC_D1 pin for r8a7778 SoC fix two pin numbers and add HSCIF pin groups to r8a7790 SoC add pinmux data for MMCIF and SDHI interfaces for r8a73a4 SoC * tag 'renesas-pinmux2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: sh-pfc: r8a7778: tidyup MMC_D1 pin pinctrl: r8a7790: fix two pin numbers sh-pfc: r8a7790: add HSCIF pin groups pinctrl: r8a73a4: add pinmux data for MMCIF and SDHI interfaces Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'drivers/pinctrl/sh-pfc/pfc-r8a7778.c')
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7778.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
index 1dcbabcd7b3c..f9039102bb43 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
@@ -1447,11 +1447,11 @@ MMC_PFC_PINS(mmc_ctrl, RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6));
MMC_PFC_CTRL(mmc_ctrl, MMC_CLK, MMC_CMD);
MMC_PFC_PINS(mmc_data1, RCAR_GP_PIN(1, 7));
MMC_PFC_DAT1(mmc_data1, MMC_D0);
-MMC_PFC_PINS(mmc_data4, RCAR_GP_PIN(1, 7), RCAR_GP_PIN(2, 8),
+MMC_PFC_PINS(mmc_data4, RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 8),
RCAR_GP_PIN(0, 5), RCAR_GP_PIN(0, 6));
MMC_PFC_DAT4(mmc_data4, MMC_D0, MMC_D1,
MMC_D2, MMC_D3);
-MMC_PFC_PINS(mmc_data8, RCAR_GP_PIN(1, 7), RCAR_GP_PIN(2, 8),
+MMC_PFC_PINS(mmc_data8, RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 8),
RCAR_GP_PIN(0, 5), RCAR_GP_PIN(0, 6),
RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 0),
RCAR_GP_PIN(0, 30), RCAR_GP_PIN(0, 31));