summaryrefslogtreecommitdiffstats
path: root/drivers/pinctrl/renesas
diff options
context:
space:
mode:
authorGeert Uytterhoeven <geert+renesas@glider.be>2021-12-23 15:56:26 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2022-02-22 09:57:19 +0100
commit4704797eb2f1a9f84a9468a8e3fb9733540fca94 (patch)
tree93243307a2508f80559c093dbe26642142add1db /drivers/pinctrl/renesas
parent6bfbaec7de9ec83c3a2f82f5dc9a2c7eb6c74041 (diff)
downloadlinux-4704797eb2f1a9f84a9468a8e3fb9733540fca94.tar.bz2
pinctrl: renesas: checker: Check drive pin conflicts
Check that there is only a single entry for each pin with drive strength capabilities. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/382206e737710afd3059abe75bc41e324823e657.1640270559.git.geert+renesas@glider.be
Diffstat (limited to 'drivers/pinctrl/renesas')
-rw-r--r--drivers/pinctrl/renesas/core.c22
1 files changed, 20 insertions, 2 deletions
diff --git a/drivers/pinctrl/renesas/core.c b/drivers/pinctrl/renesas/core.c
index 1e0b21428e83..c252eb5c9755 100644
--- a/drivers/pinctrl/renesas/core.c
+++ b/drivers/pinctrl/renesas/core.c
@@ -1154,8 +1154,26 @@ static void __init sh_pfc_check_info(const struct sh_pfc_soc_info *info)
sh_pfc_check_cfg_reg(drvname, &info->cfg_regs[i]);
/* Check drive strength registers */
- for (i = 0; info->drive_regs && info->drive_regs[i].reg; i++)
- sh_pfc_check_drive_reg(info, &info->drive_regs[i]);
+ for (i = 0; drive_regs && drive_regs[i].reg; i++)
+ sh_pfc_check_drive_reg(info, &drive_regs[i]);
+
+ for (i = 0; drive_regs && drive_regs[i / 8].reg; i++) {
+ if (!drive_regs[i / 8].fields[i % 8].pin &&
+ !drive_regs[i / 8].fields[i % 8].offset &&
+ !drive_regs[i / 8].fields[i % 8].size)
+ continue;
+
+ for (j = 0; j < i; j++) {
+ if (drive_regs[i / 8].fields[i % 8].pin ==
+ drive_regs[j / 8].fields[j % 8].pin &&
+ drive_regs[j / 8].fields[j % 8].offset &&
+ drive_regs[j / 8].fields[j % 8].size) {
+ sh_pfc_err("drive_reg 0x%x:%u/0x%x:%u: pin conflict\n",
+ drive_regs[i / 8].reg, i % 8,
+ drive_regs[j / 8].reg, j % 8);
+ }
+ }
+ }
/* Check bias registers */
for (i = 0; bias_regs && (bias_regs[i].puen || bias_regs[i].pud); i++)