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authorJohn Crispin <blogic@openwrt.org>2015-11-26 11:00:09 +0100
committerLinus Walleij <linus.walleij@linaro.org>2015-11-30 13:16:34 +0100
commit57b588c950b7e04e0f22393ad439299ba4fda9c3 (patch)
tree9ad43f71154f7dac31a4637b83612becdaab7c52 /drivers/pinctrl/pinctrl-xway.c
parentbe14811c03cf20c793fd176a347625335110b0e6 (diff)
downloadlinux-57b588c950b7e04e0f22393ad439299ba4fda9c3.tar.bz2
pinctrl/lantiq: Fix GPIO Setup of GPIO Port3
Some special handling of GPIO Port 3 is needed because of some hardware thingofabob. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Martin Schiller <mschiller@tdt.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-xway.c')
-rw-r--r--drivers/pinctrl/pinctrl-xway.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-xway.c b/drivers/pinctrl/pinctrl-xway.c
index a064962ece8b..b78baaa5ee4b 100644
--- a/drivers/pinctrl/pinctrl-xway.c
+++ b/drivers/pinctrl/pinctrl-xway.c
@@ -1563,6 +1563,10 @@ static int xway_gpio_dir_out(struct gpio_chip *chip, unsigned int pin, int val)
{
struct ltq_pinmux_info *info = dev_get_drvdata(chip->dev);
+ if (PORT(pin) == PORT3)
+ gpio_setbit(info->membase[0], GPIO3_OD, PORT_PIN(pin));
+ else
+ gpio_setbit(info->membase[0], GPIO_OD(pin), PORT_PIN(pin));
gpio_setbit(info->membase[0], GPIO_DIR(pin), PORT_PIN(pin));
xway_gpio_set(chip, pin, val);