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author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2019-07-23 18:56:31 +0300 |
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committer | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2019-08-07 16:45:41 +0300 |
commit | 2a2ed4752108a641651bb103542000810d5d89b4 (patch) | |
tree | dc82420ad10c47b4badd8d1db90da38500d5c689 /drivers/pinctrl/intel | |
parent | f702e0b93cdb7785d94d6a508e5b1dac99fd9bff (diff) | |
download | linux-2a2ed4752108a641651bb103542000810d5d89b4.tar.bz2 |
pinctrl: denverton: Provide Interrupt Status register offset
Since some of the GPIO controllers use different Interrupt Status offset,
it make sense to provide it explicitly in the driver.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'drivers/pinctrl/intel')
-rw-r--r-- | drivers/pinctrl/intel/pinctrl-denverton.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-denverton.c b/drivers/pinctrl/intel/pinctrl-denverton.c index 3a4932b557b4..fde83cd4aac5 100644 --- a/drivers/pinctrl/intel/pinctrl-denverton.c +++ b/drivers/pinctrl/intel/pinctrl-denverton.c @@ -15,8 +15,9 @@ #include "pinctrl-intel.h" #define DNV_PAD_OWN 0x020 -#define DNV_HOSTSW_OWN 0x0C0 #define DNV_PADCFGLOCK 0x090 +#define DNV_HOSTSW_OWN 0x0C0 +#define DNV_GPI_IS 0x100 #define DNV_GPI_IE 0x120 #define DNV_GPP(n, s, e) \ @@ -32,6 +33,7 @@ .padown_offset = DNV_PAD_OWN, \ .padcfglock_offset = DNV_PADCFGLOCK, \ .hostown_offset = DNV_HOSTSW_OWN, \ + .is_offset = DNV_GPI_IS, \ .ie_offset = DNV_GPI_IE, \ .pin_base = (s), \ .npins = ((e) - (s) + 1), \ |