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author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2019-07-23 18:56:26 +0300 |
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committer | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2019-08-07 16:45:41 +0300 |
commit | 3818d73612caa5a3651300bf73ab7dc9fdbc03e1 (patch) | |
tree | 34bd45bf10b36e4fbda4dc3bd6c1b9747a5f76bc /drivers/pinctrl/intel | |
parent | 7eb7ecddd3bdb9fd616bc62348ed3aaccaa9ef83 (diff) | |
download | linux-3818d73612caa5a3651300bf73ab7dc9fdbc03e1.tar.bz2 |
pinctrl: broxton: Provide Interrupt Status register offset
Since some of the GPIO controllers use different Interrupt Status offset,
it make sense to provide it explicitly in the driver.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'drivers/pinctrl/intel')
-rw-r--r-- | drivers/pinctrl/intel/pinctrl-broxton.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-broxton.c b/drivers/pinctrl/intel/pinctrl-broxton.c index e2d4505d6747..2be7e414f803 100644 --- a/drivers/pinctrl/intel/pinctrl-broxton.c +++ b/drivers/pinctrl/intel/pinctrl-broxton.c @@ -15,8 +15,9 @@ #include "pinctrl-intel.h" #define BXT_PAD_OWN 0x020 -#define BXT_HOSTSW_OWN 0x080 #define BXT_PADCFGLOCK 0x060 +#define BXT_HOSTSW_OWN 0x080 +#define BXT_GPI_IS 0x100 #define BXT_GPI_IE 0x110 #define BXT_COMMUNITY(s, e) \ @@ -24,6 +25,7 @@ .padown_offset = BXT_PAD_OWN, \ .padcfglock_offset = BXT_PADCFGLOCK, \ .hostown_offset = BXT_HOSTSW_OWN, \ + .is_offset = BXT_GPI_IS, \ .ie_offset = BXT_GPI_IE, \ .gpp_size = 32, \ .pin_base = (s), \ |