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author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-06-24 19:21:02 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-06-24 19:21:02 -0700 |
commit | 93a4b1b9465d92e8be031b57166afa3d5611e142 (patch) | |
tree | 0ac95e35f24a754e01bdc40c56d71068eed49e4c /drivers/pinctrl/core.c | |
parent | d59b92f93df2d545d87d2341eb0705cc926ea22a (diff) | |
parent | daecdc66968f122fe53038ded8cb7abe93e0aa8c (diff) | |
download | linux-93a4b1b9465d92e8be031b57166afa3d5611e142.tar.bz2 |
Merge tag 'pinctrl-v4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"Here is the bulk of pin control changes for the v4.2 series: Quite a
lot of new SoC subdrivers and two new main drivers this time, apart
from that business as usual.
Details:
Core functionality:
- Enable exclusive pin ownership: it is possible to flag a pin
controller so that GPIO and other functions cannot use a single pin
simultaneously.
New drivers:
- NXP LPC18xx System Control Unit pin controller
- Imagination Pistachio SoC pin controller
New subdrivers:
- Freescale i.MX7d SoC
- Intel Sunrisepoint-H PCH
- Renesas PFC R8A7793
- Renesas PFC R8A7794
- Mediatek MT6397, MT8127
- SiRF Atlas 7
- Allwinner A33
- Qualcomm MSM8660
- Marvell Armada 395
- Rockchip RK3368
Cleanups:
- A big cleanup of the Marvell MVEBU driver rectifying it to
correspond to reality
- Drop platform device probing from the SH PFC driver, we are now a
DT only shop for SuperH
- Drop obsolte multi-platform check for SH PFC
- Various janitorial: constification, grammar etc
Improvements:
- The AT91 GPIO portions now supports the set_multiple() feature
- Split out SPI pins on the Xilinx Zynq
- Support DTs without specific function nodes in the i.MX driver"
* tag 'pinctrl-v4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (99 commits)
pinctrl: rockchip: add support for the rk3368
pinctrl: rockchip: generalize perpin driver-strength setting
pinctrl: sh-pfc: r8a7794: add SDHI pin groups
pinctrl: sh-pfc: r8a7794: add MMCIF pin groups
pinctrl: sh-pfc: add R8A7794 PFC support
pinctrl: make pinctrl_register() return proper error code
pinctrl: mvebu: armada-39x: add support for Armada 395 variant
pinctrl: mvebu: armada-39x: add missing SATA functions
pinctrl: mvebu: armada-39x: add missing PCIe functions
pinctrl: mvebu: armada-38x: add ptp functions
pinctrl: mvebu: armada-38x: add ua1 functions
pinctrl: mvebu: armada-38x: add nand functions
pinctrl: mvebu: armada-38x: add sata functions
pinctrl: mvebu: armada-xp: add dram functions
pinctrl: mvebu: armada-xp: add nand rb function
pinctrl: mvebu: armada-xp: add spi1 function
pinctrl: mvebu: armada-39x: normalize ref clock naming
pinctrl: mvebu: armada-xp: rename spi to spi0
pinctrl: mvebu: armada-370: align spi1 clock pin naming
pinctrl: mvebu: armada-370: align VDD cpu-pd pin naming with datasheet
...
Diffstat (limited to 'drivers/pinctrl/core.c')
-rw-r--r-- | drivers/pinctrl/core.c | 21 |
1 files changed, 12 insertions, 9 deletions
diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c index 18ee2089df4a..8b8f3a04c353 100644 --- a/drivers/pinctrl/core.c +++ b/drivers/pinctrl/core.c @@ -558,7 +558,7 @@ int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, } /** - * pinctrl_request_gpio() - request a single pin to be used in as GPIO + * pinctrl_request_gpio() - request a single pin to be used as GPIO * @gpio: the GPIO pin number from the GPIO subsystem number space * * This function should *ONLY* be used from gpiolib-based GPIO drivers, @@ -1115,7 +1115,7 @@ int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps, int i, ret; struct pinctrl_maps *maps_node; - pr_debug("add %d pinmux maps\n", num_maps); + pr_debug("add %u pinctrl maps\n", num_maps); /* First sanity check the new mapping */ for (i = 0; i < num_maps; i++) { @@ -1704,14 +1704,14 @@ struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, int ret; if (!pctldesc) - return NULL; + return ERR_PTR(-EINVAL); if (!pctldesc->name) - return NULL; + return ERR_PTR(-EINVAL); pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL); if (pctldev == NULL) { dev_err(dev, "failed to alloc struct pinctrl_dev\n"); - return NULL; + return ERR_PTR(-ENOMEM); } /* Initialize pin control device struct */ @@ -1724,20 +1724,23 @@ struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, mutex_init(&pctldev->mutex); /* check core ops for sanity */ - if (pinctrl_check_ops(pctldev)) { + ret = pinctrl_check_ops(pctldev); + if (ret) { dev_err(dev, "pinctrl ops lacks necessary functions\n"); goto out_err; } /* If we're implementing pinmuxing, check the ops for sanity */ if (pctldesc->pmxops) { - if (pinmux_check_ops(pctldev)) + ret = pinmux_check_ops(pctldev); + if (ret) goto out_err; } /* If we're implementing pinconfig, check the ops for sanity */ if (pctldesc->confops) { - if (pinconf_check_ops(pctldev)) + ret = pinconf_check_ops(pctldev); + if (ret) goto out_err; } @@ -1783,7 +1786,7 @@ struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, out_err: mutex_destroy(&pctldev->mutex); kfree(pctldev); - return NULL; + return ERR_PTR(ret); } EXPORT_SYMBOL_GPL(pinctrl_register); |