Merge tag 'pinctrl-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes, nothing too exciting about
  this.

  Some changes hit arch/sh and arch/arm but are well isolated and
  acknowledged by the respective arch maintainers.

  Core changes:

   - Dropped the chained IRQ setup callback into GPIOLIB as we got rid
     of the last users of that in this changeset.

  New drivers:

   - New driver for Ingenic X1830.

   - New driver for Freescale i.MX8MP.

  Driver enhancements:

   - Fix all remaining Intel drivers to pass their IRQ chips along with
     the GPIO chips.

   - Intel Baytrail allocates its irqchip dynamically.

   - Intel Lynxpoint is thoroughly rewritten and modernized.

   - Aspeed AST2600 pin muxing and configuration is much improved.

   - Qualcomm SC7180 functions are updated and wakeup interrupt map is
     provided.

   - A whole slew of Renesas SH-PFC cleanups and improvements.

   - Fix up the Intel DT bindings to use the generic YAML DT bindings
     schema (a first user of this)"

* tag 'pinctrl-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (99 commits)
  pinctrl: madera: Remove extra blank line
  pinctrl: qcom: Don't lock around irq_set_irq_wake()
  pinctrl: mvebu: armada-37xx: use use platform api
  gpio: Drop the chained IRQ handler assign function
  pinctrl: freescale: Add i.MX8MP pinctrl driver support
  dt-bindings: imx: Add pinctrl binding doc for i.MX8MP
  pinctrl: tigerlake: Tiger Lake uses _HID enumeration
  pinctrl: sunrisepoint: Add Coffee Lake-S ACPI ID
  pinctrl: iproc: Use platform_get_irq_optional() to avoid error message
  pinctrl: dt-bindings: Fix some errors in the lgm and pinmux schema
  pinctrl: intel: Pass irqchip when adding gpiochip
  pinctrl: intel: Add GPIO <-> pin mapping ranges via callback
  pinctrl: baytrail: Replace WARN with dev_info_once when setting direct-irq pin to output
  pinctrl: baytrail: Do not clear IRQ flags on direct-irq enabled pins
  pinctrl: sunrisepoint: Add missing Interrupt Status register offset
  pinctrl: sh-pfc: Split R-Car H3 support in two independent drivers
  pinctrl: artpec6: fix __iomem on reg in set
  pinctrl: ingenic: Use devm_platform_ioremap_resource()
  pinctrl: ingenic: Factorize irq_set_type function
  pinctrl: ingenic: Remove duplicated ingenic_chip_info structures
  ...

1 files changed, 8 insertions, 2 deletions

diff --git a/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c b/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c
index 831a9318c384..25166217c3e0 100644
--- a/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c
+++ b/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c
@@ -286,6 +286,12 @@ static int iproc_gpio_irq_set_type(struct irq_data *d, unsigned int type)
 	iproc_set_bit(chip, IPROC_GPIO_INT_DE_OFFSET, gpio, dual_edge);
 	iproc_set_bit(chip, IPROC_GPIO_INT_EDGE_OFFSET, gpio,
 		       rising_or_high);
+
+	if (type & IRQ_TYPE_EDGE_BOTH)
+		irq_set_handler_locked(d, handle_edge_irq);
+	else
+		irq_set_handler_locked(d, handle_level_irq);
+
 	raw_spin_unlock_irqrestore(&chip->lock, flags);
 
 	dev_dbg(chip->dev,
@@ -843,7 +849,7 @@ static int iproc_gpio_probe(struct platform_device *pdev)
 							"gpio-ranges");
 
 	/* optional GPIO interrupt support */
-	irq = platform_get_irq(pdev, 0);
+	irq = platform_get_irq_optional(pdev, 0);
 	if (irq > 0) {
 		struct irq_chip *irqc;
 		struct gpio_irq_chip *girq;
@@ -868,7 +874,7 @@ static int iproc_gpio_probe(struct platform_device *pdev)
 			return -ENOMEM;
 		girq->parents[0] = irq;
 		girq->default_type = IRQ_TYPE_NONE;
-		girq->handler = handle_simple_irq;
+		girq->handler = handle_bad_irq;
 	}
 
 	ret = gpiochip_add_data(gc, chip);