diff options
| author | Andrew Jeffery <andrew@aj.id.au> | 2016-08-30 17:24:24 +0930 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2016-09-07 16:48:22 +0200 |
| commit | 4d3d0e4272d8d660f5f14f5abcf96fb4df1aa94b (patch) | |
| tree | a4722451117ba7c65f2c766c67c7998faac0fdac /drivers/pinctrl/Kconfig | |
| parent | 5f714700b1892f8d67495567f16c63ad7b20d6b3 (diff) | |
| download | linux-4d3d0e4272d8d660f5f14f5abcf96fb4df1aa94b.tar.bz2 | |
pinctrl: Add core support for Aspeed SoCs
The Aspeed SoCs typically provide more than 200 pins for GPIO and other
functions. The signal enabled on a pin is determined on a priority
basis, where a given pin can provide a number of different signal types.
In addition to the priority levels, the Aspeed pin controllers describe
the signal active on a pin by compound logical expressions involving
multiple operators, registers and bits. Some difficulty arises as a
pin's function bit masks for each priority level are frequently not the
same (i.e. we cannot just flip a bit to change from a high to low
priority signal), or even in the same register(s). Some configuration
bits affect multiple pins, while in other cases the signals for a bus
must each be enabled individually.
Together, these features give rise to some complexity in the
implementation. A more complete description of the complexities is
provided in the associated header file.
The patch doesn't implement pinctrl/pinmux/pinconf for any particular
Aspeed SoC, rather it adds the framework for defining pinmux
configurations.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/Kconfig')
| -rw-r--r-- | drivers/pinctrl/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index b3fe1d339632..0e75d94972ba 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -254,6 +254,7 @@ config PINCTRL_ZYNQ help This selects the pinctrl driver for Xilinx Zynq. +source "drivers/pinctrl/aspeed/Kconfig" source "drivers/pinctrl/bcm/Kconfig" source "drivers/pinctrl/berlin/Kconfig" source "drivers/pinctrl/freescale/Kconfig" |