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| author | Roger Quadros <rogerq@ti.com> | 2017-08-07 12:11:02 +0300 |
|---|---|---|
| committer | Kishon Vijay Abraham I <kishon@ti.com> | 2017-08-20 13:59:47 +0530 |
| commit | 325ce0fe58992b67edea103339e00b028e38e40e (patch) | |
| tree | 5a77fe43d9e4e0b61a3e8d366af5b746cf4cec16 /drivers/phy | |
| parent | 8387c576b713bf677d59b7f16be64adb6b2de660 (diff) | |
| download | linux-325ce0fe58992b67edea103339e00b028e38e40e.tar.bz2 | |
phy: ti-pipe3: Use TRM recommended settings for SATA DPLL
The AM572x Technical Reference Manual, SPRUHZ6H,
Revised November 2016 [1], shows recommended settings for the
SATA DPLL in Table 26-8. DPLL CLKDCOLDO Recommended Settings.
Use those settings in the driver. The TRM does not show
a value for 20MHz SYS_CLK so we use something close to the
26MHz setting.
[1] - http://www.ti.com/lit/ug/spruhz6h/spruhz6h.pdf
Signed-off-by: Roger Quadros <rogerq@ti.com>
[nsekhar@ti.com: add exact TRM version to commit text]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/phy')
| -rw-r--r-- | drivers/phy/ti/phy-ti-pipe3.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/phy/ti/phy-ti-pipe3.c b/drivers/phy/ti/phy-ti-pipe3.c index 9c84d32c6f60..0e564f32749f 100644 --- a/drivers/phy/ti/phy-ti-pipe3.c +++ b/drivers/phy/ti/phy-ti-pipe3.c @@ -118,12 +118,12 @@ static struct pipe3_dpll_map dpll_map_usb[] = { }; static struct pipe3_dpll_map dpll_map_sata[] = { - {12000000, {1000, 7, 4, 6, 0} }, /* 12 MHz */ - {16800000, {714, 7, 4, 6, 0} }, /* 16.8 MHz */ + {12000000, {625, 4, 4, 6, 0} }, /* 12 MHz */ + {16800000, {625, 6, 4, 7, 0} }, /* 16.8 MHz */ {19200000, {625, 7, 4, 6, 0} }, /* 19.2 MHz */ - {20000000, {600, 7, 4, 6, 0} }, /* 20 MHz */ - {26000000, {461, 7, 4, 6, 0} }, /* 26 MHz */ - {38400000, {312, 7, 4, 6, 0} }, /* 38.4 MHz */ + {20000000, {750, 9, 4, 6, 0} }, /* 20 MHz */ + {26000000, {750, 12, 4, 6, 0} }, /* 26 MHz */ + {38400000, {625, 15, 4, 6, 0} }, /* 38.4 MHz */ { }, /* Terminator */ }; |