diff options
| author | Suzuki K Poulose <suzuki.poulose@arm.com> | 2018-07-10 09:58:04 +0100 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2018-07-10 18:19:30 +0100 |
| commit | c13207905340d85eaddd85b6d2868218f324b180 (patch) | |
| tree | f633d2f33266ba3a7ac672c1d822b6733f490a90 /drivers/perf | |
| parent | 3cce50dfec4a5b0414c974190940f47dd32c6dee (diff) | |
| download | linux-c13207905340d85eaddd85b6d2868218f324b180.tar.bz2 | |
arm64: perf: Add support for chaining event counters
Add support for 64bit event by using chained event counters
and 64bit cycle counters.
PMUv3 allows chaining a pair of adjacent 32-bit counters, effectively
forming a 64-bit counter. The low/even counter is programmed to count
the event of interest, and the high/odd counter is programmed to count
the CHAIN event, taken when the low/even counter overflows.
For CPU cycles, when 64bit mode is requested, the cycle counter
is used in 64bit mode. If the cycle counter is not available,
falls back to chaining.
Cc: Will Deacon <will.deacon@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'drivers/perf')
| -rw-r--r-- | drivers/perf/arm_pmu.c | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/drivers/perf/arm_pmu.c b/drivers/perf/arm_pmu.c index a28881058f18..7f01f6f60b87 100644 --- a/drivers/perf/arm_pmu.c +++ b/drivers/perf/arm_pmu.c @@ -665,14 +665,9 @@ static void cpu_pm_pmu_setup(struct arm_pmu *armpmu, unsigned long cmd) int idx; for (idx = 0; idx < armpmu->num_events; idx++) { - /* - * If the counter is not used skip it, there is no - * need of stopping/restarting it. - */ - if (!test_bit(idx, hw_events->used_mask)) - continue; - event = hw_events->events[idx]; + if (!event) + continue; switch (cmd) { case CPU_PM_ENTER: |